arch/x86/events/amd/core.c

686

rdmsrq(x86_pmu_event_addr(idx), counter);

arch/x86/events/core.c

1270

hwc->event_base = x86_pmu_event_addr(hwc->idx);

arch/x86/events/core.c

1459

wrmsrq(x86_pmu_event_addr(idx + 1), 0xffff);

arch/x86/events/core.c

1604

rdmsrq(x86_pmu_event_addr(idx), pmc_count);

arch/x86/events/core.c

225

if (!reserve_perfctr_nmi(x86_pmu_event_addr(i)))

arch/x86/events/core.c

245

release_perfctr_nmi(x86_pmu_event_addr(i));

arch/x86/events/core.c

256

release_perfctr_nmi(x86_pmu_event_addr(i));

arch/x86/events/core.c

2568

wrmsrq(x86_pmu_event_addr(i), 0);

arch/x86/events/core.c

326

reg = x86_pmu_event_addr(reg_safe);

arch/x86/events/intel/core.c

3715

wrmsrq_safe(x86_pmu_event_addr(idx), 0ull);