xtensa_get_sr
#define xip_elapsed_since(x) ((xtensa_get_sr(ccount) - (x)) / 1000) /* should work up to 1GHz */
#define xip_irqpending() (xtensa_get_sr(interrupt) & xtensa_get_sr(intenable))
#define xip_currtime() (xtensa_get_sr(ccount))
return xtensa_get_sr(ccount);
return xtensa_get_sr(SREG_CCOMPARE + LINUX_TIMER);
ibreakenable = xtensa_get_sr(SREG_IBREAKENABLE);
ibreakenable = xtensa_get_sr(SREG_IBREAKENABLE);
xtensa_get_sr(SREG_EPC), xtensa_get_sr(SREG_EXCSAVE));
if (xtensa_get_sr(SREG_EPC) != XCHAL_HW_CONFIGID0 ||
xtensa_get_sr(SREG_EXCSAVE) != XCHAL_HW_CONFIGID1)
xtensa_get_sr(SREG_EPC), xtensa_get_sr(SREG_EXCSAVE),
unsigned intread = xtensa_get_sr(interrupt);
unsigned intenable = xtensa_get_sr(intenable);
unsigned intread = xtensa_get_sr(interrupt);
unsigned intenable = xtensa_get_sr(intenable);
*cpenable = xtensa_get_sr(cpenable);
irq_mask = xtensa_get_sr(intenable);
irq_mask = xtensa_get_sr(intenable);