wrmsr_safe
!wrmsr_safe(MSR_IA32_MISC_ENABLE,
!wrmsr_safe(MSR_EFER,
if (wrmsr_safe(msr, a, b) < 0) {
rv->err = wrmsr_safe(rv->msr_no, rv->reg.l, rv->reg.h);
wrmsr_safe(MSR_IA32_THERM_CONTROL,
if (wrmsr_safe(cfg->msr_clear_eccerrlog_offset,
wrmsr_safe(MSR_IA32_PACKAGE_THERM_INTERRUPT, l, h);
wrmsr_safe(MSR_IA32_PACKAGE_THERM_INTERRUPT, l, h);
return wrmsr_safe(MSR_IA32_TEMPERATURE_TARGET, val.l, val.h);
return wrmsr_safe(APIC_BASE_MSR + (reg >> 4), value);
static inline u8 wrmsr_safe(u32 msr, u64 val)
vector = wrmsr_safe(msr->idx, msr->write_val);
vector = wrmsr_safe(msr->idx, 0);
vec = wrmsr_safe(msr, val);
vec = wrmsr_safe(msr->index, msr->write_val);
u8 vec = wrmsr_safe(msr->index, msr->rsvd_val);
vector = wrmsr_safe(msr, test_val);
vector = wrmsr_safe(msr, 0);
vector = wrmsr_safe(MSR_CORE_PERF_FIXED_CTR_CTRL,
vector = wrmsr_safe(MSR_CORE_PERF_GLOBAL_CTRL,
u8 vector = wrmsr_safe(MSR_IA32_PERF_CAPABILITIES, val);