arch/arm64/kvm/at.c

1438

write_sysreg_el1(vcpu_read_sys_reg(vcpu, TTBR0_EL1), SYS_TTBR0);

arch/arm64/kvm/at.c

1439

write_sysreg_el1(vcpu_read_sys_reg(vcpu, TTBR1_EL1), SYS_TTBR1);

arch/arm64/kvm/at.c

1440

write_sysreg_el1(vcpu_read_sys_reg(vcpu, TCR_EL1), SYS_TCR);

arch/arm64/kvm/at.c

1441

write_sysreg_el1(vcpu_read_sys_reg(vcpu, MAIR_EL1), SYS_MAIR);

arch/arm64/kvm/at.c

1443

write_sysreg_el1(vcpu_read_sys_reg(vcpu, TCR2_EL1), SYS_TCR2);

arch/arm64/kvm/at.c

1445

write_sysreg_el1(vcpu_read_sys_reg(vcpu, PIR_EL1), SYS_PIR);

arch/arm64/kvm/at.c

1446

write_sysreg_el1(vcpu_read_sys_reg(vcpu, PIRE0_EL1), SYS_PIRE0);

arch/arm64/kvm/at.c

1449

write_sysreg_el1(vcpu_read_sys_reg(vcpu, POR_EL1), SYS_POR);

arch/arm64/kvm/at.c

1453

write_sysreg_el1(vcpu_read_sys_reg(vcpu, SCTLR_EL1), SYS_SCTLR);

arch/arm64/kvm/at.c

673

write_sysreg_el1(config->ttbr0, SYS_TTBR0);

arch/arm64/kvm/at.c

674

write_sysreg_el1(config->ttbr1, SYS_TTBR1);

arch/arm64/kvm/at.c

675

write_sysreg_el1(config->tcr, SYS_TCR);

arch/arm64/kvm/at.c

676

write_sysreg_el1(config->mair, SYS_MAIR);

arch/arm64/kvm/at.c

678

write_sysreg_el1(config->tcr2, SYS_TCR2);

arch/arm64/kvm/at.c

680

write_sysreg_el1(config->pir, SYS_PIR);

arch/arm64/kvm/at.c

681

write_sysreg_el1(config->pire0, SYS_PIRE0);

arch/arm64/kvm/at.c

684

write_sysreg_el1(config->por_el1, SYS_POR);

arch/arm64/kvm/at.c

688

write_sysreg_el1(config->sctlr, SYS_SCTLR);

arch/arm64/kvm/debug.c

114

write_sysreg_el1(0, SYS_PMSCR);

arch/arm64/kvm/hyp/include/hyp/switch.h

490

write_sysreg_el1(__vcpu_sys_reg(vcpu, vcpu_sve_zcr_elx(vcpu)), SYS_ZCR);

arch/arm64/kvm/hyp/include/hyp/switch.h

521

write_sysreg_el1(zcr_el1, SYS_ZCR);

arch/arm64/kvm/hyp/include/hyp/switch.h

558

write_sysreg_el1(zcr_el1, SYS_ZCR);

arch/arm64/kvm/hyp/include/hyp/switch.h

669

write_sysreg_el1(val, SYS_SCTLR);

arch/arm64/kvm/hyp/include/hyp/switch.h

672

write_sysreg_el1(val, SYS_TTBR0);

arch/arm64/kvm/hyp/include/hyp/switch.h

675

write_sysreg_el1(val, SYS_TTBR1);

arch/arm64/kvm/hyp/include/hyp/switch.h

678

write_sysreg_el1(val, SYS_TCR);

arch/arm64/kvm/hyp/include/hyp/switch.h

681

write_sysreg_el1(val, SYS_ESR);

arch/arm64/kvm/hyp/include/hyp/switch.h

684

write_sysreg_el1(val, SYS_FAR);

arch/arm64/kvm/hyp/include/hyp/switch.h

687

write_sysreg_el1(val, SYS_AFSR0);

arch/arm64/kvm/hyp/include/hyp/switch.h

690

write_sysreg_el1(val, SYS_AFSR1);

arch/arm64/kvm/hyp/include/hyp/switch.h

693

write_sysreg_el1(val, SYS_MAIR);

arch/arm64/kvm/hyp/include/hyp/switch.h

696

write_sysreg_el1(val, SYS_AMAIR);

arch/arm64/kvm/hyp/include/hyp/switch.h

699

write_sysreg_el1(val, SYS_CONTEXTIDR);

arch/arm64/kvm/hyp/include/hyp/switch.h

803

write_sysreg_el1(val, SYS_TCR);

arch/arm64/kvm/hyp/include/hyp/sysreg-sr.h

219

write_sysreg_el1(ctxt_sys_reg(ctxt, SCTLR_EL1), SYS_SCTLR);

arch/arm64/kvm/hyp/include/hyp/sysreg-sr.h

220

write_sysreg_el1(ctxt_sys_reg(ctxt, TCR_EL1), SYS_TCR);

arch/arm64/kvm/hyp/include/hyp/sysreg-sr.h

227

write_sysreg_el1((ctxt_sys_reg(ctxt, TCR_EL1) |

arch/arm64/kvm/hyp/include/hyp/sysreg-sr.h

233

write_sysreg_el1(ctxt_sys_reg(ctxt, CPACR_EL1), SYS_CPACR);

arch/arm64/kvm/hyp/include/hyp/sysreg-sr.h

234

write_sysreg_el1(ctxt_sys_reg(ctxt, TTBR0_EL1), SYS_TTBR0);

arch/arm64/kvm/hyp/include/hyp/sysreg-sr.h

235

write_sysreg_el1(ctxt_sys_reg(ctxt, TTBR1_EL1), SYS_TTBR1);

arch/arm64/kvm/hyp/include/hyp/sysreg-sr.h

237

write_sysreg_el1(ctxt_sys_reg(ctxt, TCR2_EL1), SYS_TCR2);

arch/arm64/kvm/hyp/include/hyp/sysreg-sr.h

240

write_sysreg_el1(ctxt_sys_reg(ctxt, PIR_EL1), SYS_PIR);

arch/arm64/kvm/hyp/include/hyp/sysreg-sr.h

241

write_sysreg_el1(ctxt_sys_reg(ctxt, PIRE0_EL1), SYS_PIRE0);

arch/arm64/kvm/hyp/include/hyp/sysreg-sr.h

245

write_sysreg_el1(ctxt_sys_reg(ctxt, POR_EL1), SYS_POR);

arch/arm64/kvm/hyp/include/hyp/sysreg-sr.h

247

write_sysreg_el1(ctxt_sys_reg(ctxt, ESR_EL1), SYS_ESR);

arch/arm64/kvm/hyp/include/hyp/sysreg-sr.h

248

write_sysreg_el1(ctxt_sys_reg(ctxt, AFSR0_EL1), SYS_AFSR0);

arch/arm64/kvm/hyp/include/hyp/sysreg-sr.h

249

write_sysreg_el1(ctxt_sys_reg(ctxt, AFSR1_EL1), SYS_AFSR1);

arch/arm64/kvm/hyp/include/hyp/sysreg-sr.h

250

write_sysreg_el1(ctxt_sys_reg(ctxt, FAR_EL1), SYS_FAR);

arch/arm64/kvm/hyp/include/hyp/sysreg-sr.h

251

write_sysreg_el1(ctxt_sys_reg(ctxt, MAIR_EL1), SYS_MAIR);

arch/arm64/kvm/hyp/include/hyp/sysreg-sr.h

252

write_sysreg_el1(ctxt_sys_reg(ctxt, VBAR_EL1), SYS_VBAR);

arch/arm64/kvm/hyp/include/hyp/sysreg-sr.h

253

write_sysreg_el1(ctxt_sys_reg(ctxt, CONTEXTIDR_EL1), SYS_CONTEXTIDR);

arch/arm64/kvm/hyp/include/hyp/sysreg-sr.h

254

write_sysreg_el1(ctxt_sys_reg(ctxt, AMAIR_EL1), SYS_AMAIR);

arch/arm64/kvm/hyp/include/hyp/sysreg-sr.h

255

write_sysreg_el1(ctxt_sys_reg(ctxt, CNTKCTL_EL1), SYS_CNTKCTL);

arch/arm64/kvm/hyp/include/hyp/sysreg-sr.h

260

write_sysreg_el1(ctxt_sys_reg(ctxt, TFSR_EL1), SYS_TFSR);

arch/arm64/kvm/hyp/include/hyp/sysreg-sr.h

277

write_sysreg_el1(ctxt_sys_reg(ctxt, SCTLR_EL1), SYS_SCTLR);

arch/arm64/kvm/hyp/include/hyp/sysreg-sr.h

279

write_sysreg_el1(ctxt_sys_reg(ctxt, TCR_EL1), SYS_TCR);

arch/arm64/kvm/hyp/include/hyp/sysreg-sr.h

283

write_sysreg_el1(ctxt_sys_reg(ctxt, ELR_EL1), SYS_ELR);

arch/arm64/kvm/hyp/include/hyp/sysreg-sr.h

284

write_sysreg_el1(ctxt_sys_reg(ctxt, SPSR_EL1), SYS_SPSR);

arch/arm64/kvm/hyp/include/hyp/sysreg-sr.h

287

write_sysreg_el1(ctxt_sys_reg(ctxt, SCTLR2_EL1), SYS_SCTLR2);

arch/arm64/kvm/hyp/nvhe/debug-sr.c

175

write_sysreg_el1(0, SYS_BRBCR);

arch/arm64/kvm/hyp/nvhe/debug-sr.c

186

write_sysreg_el1(brbcr_el1, SYS_BRBCR);

arch/arm64/kvm/hyp/nvhe/debug-sr.c

35

write_sysreg_el1(0, SYS_PMSCR);

arch/arm64/kvm/hyp/nvhe/debug-sr.c

62

write_sysreg_el1(*host_data_ptr(host_debug_state.pmscr_el1), SYS_PMSCR);

arch/arm64/kvm/hyp/nvhe/debug-sr.c

68

write_sysreg_el1(new_trfcr, SYS_TRFCR);

arch/arm64/kvm/hyp/nvhe/hyp-main.c

63

write_sysreg_el1(ctxt_sys_reg(hctxt, ZCR_EL1), SYS_ZCR);

arch/arm64/kvm/hyp/nvhe/hyp-main.c

876

write_sysreg_el1(read_sysreg_el2(SYS_FAR), SYS_FAR);

arch/arm64/kvm/hyp/nvhe/hyp-main.c

878

write_sysreg_el1(esr, SYS_ESR);

arch/arm64/kvm/hyp/nvhe/hyp-main.c

879

write_sysreg_el1(read_sysreg_el2(SYS_ELR), SYS_ELR);

arch/arm64/kvm/hyp/nvhe/hyp-main.c

880

write_sysreg_el1(spsr_el1, SYS_SPSR);

arch/arm64/kvm/hyp/nvhe/psci-relay.c

213

write_sysreg_el1(INIT_SCTLR_EL1_MMU_OFF, SYS_SCTLR);

arch/arm64/kvm/hyp/nvhe/switch.c

74

write_sysreg_el1(ctxt_sys_reg(ctxt, SCTLR_EL1), SYS_SCTLR);

arch/arm64/kvm/hyp/nvhe/switch.c

76

write_sysreg_el1(ctxt_sys_reg(ctxt, TCR_EL1), SYS_TCR);

arch/arm64/kvm/hyp/nvhe/switch.c

96

write_sysreg_el1(val | TCR_EPD1_MASK | TCR_EPD0_MASK, SYS_TCR);

arch/arm64/kvm/hyp/nvhe/switch.c

99

write_sysreg_el1(val | SCTLR_ELx_M, SYS_SCTLR);

arch/arm64/kvm/hyp/nvhe/sys_regs.c

269

write_sysreg_el1(esr, SYS_ESR);

arch/arm64/kvm/hyp/nvhe/sys_regs.c

270

write_sysreg_el1(read_sysreg_el2(SYS_ELR), SYS_ELR);

arch/arm64/kvm/hyp/nvhe/sys_regs.c

271

write_sysreg_el1(read_sysreg_el2(SYS_SPSR), SYS_SPSR);

arch/arm64/kvm/hyp/nvhe/tlb.c

140

write_sysreg_el1(cxt->sctlr, SYS_SCTLR);

arch/arm64/kvm/hyp/nvhe/tlb.c

144

write_sysreg_el1(cxt->tcr, SYS_TCR);

arch/arm64/kvm/hyp/nvhe/tlb.c

88

write_sysreg_el1(val, SYS_TCR);

arch/arm64/kvm/hyp/nvhe/tlb.c

95

write_sysreg_el1(val, SYS_SCTLR);

arch/arm64/kvm/hyp/vhe/sysreg-sr.c

105

write_sysreg_el1(__vcpu_sys_reg(vcpu, SCTLR_EL2), SYS_SCTLR);

arch/arm64/kvm/hyp/vhe/sysreg-sr.c

106

write_sysreg_el1(__vcpu_sys_reg(vcpu, CPTR_EL2), SYS_CPACR);

arch/arm64/kvm/hyp/vhe/sysreg-sr.c

107

write_sysreg_el1(__vcpu_sys_reg(vcpu, TTBR0_EL2), SYS_TTBR0);

arch/arm64/kvm/hyp/vhe/sysreg-sr.c

108

write_sysreg_el1(__vcpu_sys_reg(vcpu, TTBR1_EL2), SYS_TTBR1);

arch/arm64/kvm/hyp/vhe/sysreg-sr.c

109

write_sysreg_el1(__vcpu_sys_reg(vcpu, TCR_EL2), SYS_TCR);

arch/arm64/kvm/hyp/vhe/sysreg-sr.c

110

write_sysreg_el1(__vcpu_sys_reg(vcpu, CNTHCTL_EL2), SYS_CNTKCTL);

arch/arm64/kvm/hyp/vhe/sysreg-sr.c

117

write_sysreg_el1(val, SYS_SCTLR);

arch/arm64/kvm/hyp/vhe/sysreg-sr.c

119

write_sysreg_el1(val, SYS_CPACR);

arch/arm64/kvm/hyp/vhe/sysreg-sr.c

121

write_sysreg_el1(val, SYS_TTBR0);

arch/arm64/kvm/hyp/vhe/sysreg-sr.c

123

write_sysreg_el1(val, SYS_TCR);

arch/arm64/kvm/hyp/vhe/sysreg-sr.c

127

write_sysreg_el1(__vcpu_sys_reg(vcpu, TCR2_EL2), SYS_TCR2);

arch/arm64/kvm/hyp/vhe/sysreg-sr.c

130

write_sysreg_el1(__vcpu_sys_reg(vcpu, PIR_EL2), SYS_PIR);

arch/arm64/kvm/hyp/vhe/sysreg-sr.c

131

write_sysreg_el1(__vcpu_sys_reg(vcpu, PIRE0_EL2), SYS_PIRE0);

arch/arm64/kvm/hyp/vhe/sysreg-sr.c

135

write_sysreg_el1(__vcpu_sys_reg(vcpu, POR_EL2), SYS_POR);

arch/arm64/kvm/hyp/vhe/sysreg-sr.c

138

write_sysreg_el1(__vcpu_sys_reg(vcpu, ESR_EL2), SYS_ESR);

arch/arm64/kvm/hyp/vhe/sysreg-sr.c

139

write_sysreg_el1(__vcpu_sys_reg(vcpu, AFSR0_EL2), SYS_AFSR0);

arch/arm64/kvm/hyp/vhe/sysreg-sr.c

140

write_sysreg_el1(__vcpu_sys_reg(vcpu, AFSR1_EL2), SYS_AFSR1);

arch/arm64/kvm/hyp/vhe/sysreg-sr.c

141

write_sysreg_el1(__vcpu_sys_reg(vcpu, FAR_EL2), SYS_FAR);

arch/arm64/kvm/hyp/vhe/sysreg-sr.c

143

write_sysreg_el1(__vcpu_sys_reg(vcpu, ELR_EL2), SYS_ELR);

arch/arm64/kvm/hyp/vhe/sysreg-sr.c

144

write_sysreg_el1(__vcpu_sys_reg(vcpu, SPSR_EL2), SYS_SPSR);

arch/arm64/kvm/hyp/vhe/sysreg-sr.c

147

write_sysreg_el1(__vcpu_sys_reg(vcpu, SCTLR2_EL2), SYS_SCTLR2);

arch/arm64/kvm/hyp/vhe/sysreg-sr.c

197

write_sysreg_el1(val, SYS_MPAM1);

arch/arm64/kvm/hyp/vhe/sysreg-sr.c

95

write_sysreg_el1(__vcpu_sys_reg(vcpu, MAIR_EL2), SYS_MAIR);

arch/arm64/kvm/hyp/vhe/sysreg-sr.c

96

write_sysreg_el1(__vcpu_sys_reg(vcpu, VBAR_EL2), SYS_VBAR);

arch/arm64/kvm/hyp/vhe/sysreg-sr.c

97

write_sysreg_el1(__vcpu_sys_reg(vcpu, CONTEXTIDR_EL2), SYS_CONTEXTIDR);

arch/arm64/kvm/hyp/vhe/sysreg-sr.c

98

write_sysreg_el1(__vcpu_sys_reg(vcpu, AMAIR_EL2), SYS_AMAIR);

arch/arm64/kvm/hyp/vhe/tlb.c

45

write_sysreg_el1(val, SYS_TCR);

arch/arm64/kvm/hyp/vhe/tlb.c

48

write_sysreg_el1(val, SYS_SCTLR);

arch/arm64/kvm/hyp/vhe/tlb.c

85

write_sysreg_el1(cxt->tcr, SYS_TCR);

arch/arm64/kvm/hyp/vhe/tlb.c

86

write_sysreg_el1(cxt->sctlr, SYS_SCTLR);

arch/arm64/kvm/sys_regs.c

360

write_sysreg_el1(val, SYS_CNTKCTL);