drivers/phy/xilinx/phy-zynqmp.c

435

xpsgtr_clr_set(gtr_phy->dev, PLL_REF_SEL(gtr_phy->lane),

drivers/phy/xilinx/phy-zynqmp.c

440

xpsgtr_clr_set(gtr_phy->dev, L0_Ln_REF_CLK_SEL(gtr_phy->lane),

drivers/phy/xilinx/phy-zynqmp.c

443

xpsgtr_clr_set(gtr_phy->dev, L0_Ln_REF_CLK_SEL(gtr_phy->lane),

drivers/phy/xilinx/phy-zynqmp.c

486

xpsgtr_clr_set(gtr_dev, ICM_CFG0, ICM_CFG0_L0_MASK, protocol);

drivers/phy/xilinx/phy-zynqmp.c

489

xpsgtr_clr_set(gtr_dev, ICM_CFG0, ICM_CFG0_L1_MASK,

drivers/phy/xilinx/phy-zynqmp.c

493

xpsgtr_clr_set(gtr_dev, ICM_CFG1, ICM_CFG0_L0_MASK, protocol);

drivers/phy/xilinx/phy-zynqmp.c

496

xpsgtr_clr_set(gtr_dev, ICM_CFG1, ICM_CFG0_L1_MASK,

drivers/phy/xilinx/phy-zynqmp.c

543

xpsgtr_clr_set(gtr_dev, TX_PROT_BUS_WIDTH, mask, val);

drivers/phy/xilinx/phy-zynqmp.c

544

xpsgtr_clr_set(gtr_dev, RX_PROT_BUS_WIDTH, mask, val);

drivers/phy/xilinx/phy-zynqmp.c

601

xpsgtr_clr_set(gtr_dev, TM_CMN_RST, TM_CMN_RST_MASK, TM_CMN_RST_SET);

drivers/phy/xilinx/phy-zynqmp.c

604

xpsgtr_clr_set(gtr_dev, TM_CMN_RST, TM_CMN_RST_MASK, TM_CMN_RST_EN);

drivers/phy/xilinx/phy-zynqmp.c

617

xpsgtr_clr_set(gtr_dev, TM_CMN_RST, TM_CMN_RST_MASK, TM_CMN_RST_SET);

drivers/phy/xilinx/phy-zynqmp.c

641

xpsgtr_clr_set(gtr_dev, TM_CMN_RST, TM_CMN_RST_MASK, TM_CMN_RST_EN);

drivers/phy/xilinx/phy-zynqmp.c

652

xpsgtr_clr_set(gtr_dev, TM_CMN_RST, TM_CMN_RST_MASK, TM_CMN_RST_SET);