D9
SIG_EXPR_LIST_DECL_SINGLE(D9, GPIOT6, GPIOT6, SIG_DESC_SET(SCUA0, 6));
SIG_EXPR_LIST_DECL_SINGLE(D9, RMII2TXEN, RMII2, RMII2_DESC);
SIG_EXPR_LIST_DECL_SINGLE(D9, RGMII2TXCK, RGMII2);
PIN_DECL_(D9, SIG_EXPR_LIST_PTR(D9, GPIOT6), SIG_EXPR_LIST_PTR(D9, RMII2TXEN),
SIG_EXPR_LIST_PTR(D9, RGMII2TXCK));
FUNC_GROUP_DECL(RMII2, D9, E9, A10, B10, C10, D10, C9, B9, A9, E8, D8, C8);
FUNC_GROUP_DECL(RGMII2, D9, E9, A10, B10, C10, D10, C9, B9, A9, E8, D8, C8);
ASPEED_PINCTRL_PIN(D9),
ASPEED_SB_PINCONF(PIN_CONFIG_DRIVE_STRENGTH, D9, D10, SCU90, 11),
ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_PULL_DOWN, D9, D10, SCU90, 14),
ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_DISABLE, D9, D10, SCU90, 14),
SIG_EXPR_LIST_DECL_SINGLE(D9, SD1DAT1, SD1, SD1_DESC);
SIG_EXPR_LIST_DECL_SINGLE(D9, SDA11, I2C11, I2C11_DESC);
PIN_DECL_2(D9, GPIOC3, SD1DAT1, SDA11);
FUNC_GROUP_DECL(I2C11, B12, D9);
FUNC_GROUP_DECL(SD1, C12, A12, B12, D9, D10, E12, C11, B11);
ASPEED_PINCTRL_PIN(D9),
PIC32_PINCTRL_GROUP(57, D9,
PINMUX_IPSR_GPSR(IP2_15_12, D9),
PINMUX_IPSR_NOGP(IP2_27, D9),
PIN_NOGP_CFG(D9, "D9", fn, SH_PFC_PIN_CFG_PULL_UP), \
PINMUX_IPSR_GPSR(IP1_3_0, D9),
PINMUX_IPSR_GPSR(IP0_9, D9),
PINMUX_SINGLE(D9),
PINMUX_IPSR_GPSR(IP1_7_6, D9),
#define IP6_19_16 FM(D9) FM(LCDOUT1) FM(MSIOF2_SYNC_D) F_(0, 0) FM(VI4_DATA1_A) F_(0, 0) FM(DU_DR1) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define GPSR0_9 F_(D9, IP6_19_16)
PINMUX_IPSR_GPSR(IP6_19_16, D9),
#define IP6_19_16 FM(D9) FM(LCDOUT1) FM(MSIOF2_SYNC_D) F_(0, 0) FM(VI4_DATA1_A) F_(0, 0) FM(DU_DR1) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define GPSR0_9 F_(D9, IP6_19_16)
PINMUX_IPSR_GPSR(IP6_19_16, D9),
#define IP6_19_16 FM(D9) FM(LCDOUT1) FM(MSIOF2_SYNC_D) F_(0, 0) FM(VI4_DATA1_A) F_(0, 0) FM(DU_DR1) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define GPSR0_9 F_(D9, IP6_19_16)
PINMUX_IPSR_GPSR(IP6_19_16, D9),
#define IP6_11_8 FM(VI1_DATA6) F_(0, 0) FM(RX4) FM(D9) FM(MMC_CLK) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
PINMUX_IPSR_GPSR(IP6_11_8, D9),
#define IP6_11_8 FM(VI1_DATA6) F_(0, 0) F_(0, 0) FM(D9) FM(MMC_D2) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
PINMUX_IPSR_GPSR(IP6_11_8, D9),
#define IP6_27_24 FM(D9) FM(MSIOF2_SYNC_A) F_(0, 0) F_(0, 0) FM(VI5_DATA10_A) FM(DU_DG0) FM(RIF3_SYNC_B) FM(HRX3_E) FM(LCDOUT8) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define GPSR0_9 F_(D9, IP6_27_24)
PINMUX_IPSR_GPSR(IP6_27_24, D9),
#define IP1SR2_3_0 FM(GP2_08) FM(HRX2) FM(MSIOF4_SS1) FM(RX4) F_(0, 0) FM(D9) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
PINMUX_IPSR_MSEL(IP1SR2_3_0, D9, SEL_I2C3_0),
GPIO_FN(D9),
GPIO_FN(D9),
GPIO_FN(D9),
GPIO_FN(D9), GPIO_FN(SD0_CMD_A), GPIO_FN(MMC_CMD_A), GPIO_FN(QIO3_A),
PINMUX_IPSR_GPSR(IP2_16_14, D9),
GPIO_FN(D9),