xpcs_read
ret = xpcs_read(xpcs, MDIO_MMD_PCS, MDIO_CTRL2);
an_stat1 = xpcs_read(xpcs, MDIO_MMD_AN, MDIO_STAT1);
ret = xpcs_read(xpcs, MDIO_MMD_VEND2, DW_VR_MII_AN_INTR_STS);
speed = xpcs_read(xpcs, MDIO_MMD_VEND2, MII_BMCR);
duplex = xpcs_read(xpcs, MDIO_MMD_VEND2, MII_ADVERTISE);
lpa = xpcs_read(xpcs, MDIO_MMD_VEND2, MII_LPA);
bmsr = xpcs_read(xpcs, MDIO_MMD_VEND2, MII_BMSR);
an_intr = xpcs_read(xpcs, MDIO_MMD_VEND2, DW_VR_MII_AN_INTR_STS);
ret = xpcs_read(xpcs, MDIO_MMD_VEND2, MII_BMSR);
ret = xpcs_read(xpcs, MDIO_MMD_PCS, MII_PHYSID1);
ret = xpcs_read(xpcs, MDIO_MMD_PCS, MII_PHYSID2);
ret = xpcs_read(xpcs, MDIO_MMD_VEND2, MII_PHYSID1);
ret = xpcs_read(xpcs, MDIO_MMD_VEND2, MII_PHYSID2);
ret = xpcs_read(xpcs, MDIO_MMD_PMAPMD, MDIO_DEVID1);
ret = xpcs_read(xpcs, MDIO_MMD_PMAPMD, MDIO_DEVID2);
return xpcs_read(xpcs, dev, DW_VENDOR | reg);
ret = read_poll_timeout(xpcs_read, val,
ret = xpcs_read(xpcs, MDIO_MMD_PCS, MDIO_STAT2);
ret = xpcs_read(xpcs, MDIO_MMD_PCS, MDIO_PCS_10GBRT_STAT1);
ret = xpcs_read(xpcs, MDIO_MMD_PCS, MDIO_PCS_10GBRT_STAT2);
ret = xpcs_read(xpcs, MDIO_MMD_AN, MDIO_AN_LPA);
ret = xpcs_read(xpcs, MDIO_MMD_AN, MDIO_AN_LPA + i);
pcs_ctrl1 = xpcs_read(xpcs, MDIO_MMD_PCS, MDIO_CTRL1);
pmd_rxdet = xpcs_read(xpcs, MDIO_MMD_PMAPMD, MDIO_PMA_RXDET);
mdio_ctrl = xpcs_read(xpcs, MDIO_MMD_VEND2, MII_BMCR);
mdio_ctrl = xpcs_read(xpcs, MDIO_MMD_VEND2, MII_BMCR);
pcs_stat1 = xpcs_read(xpcs, MDIO_MMD_PCS, MDIO_STAT1);
int xpcs_read(struct dw_xpcs *xpcs, int dev, u32 reg);