xl
struct intel_excl_states *xl;
xl = &excl_cntrs->states[tid];
xl->sched_started = true;
struct intel_excl_states *xl;
xl = &excl_cntrs->states[tid];
xl->state[cntr] = INTEL_EXCL_EXCLUSIVE;
xl->state[cntr] = INTEL_EXCL_SHARED;
struct intel_excl_states *xl;
xl = &excl_cntrs->states[tid];
xl->sched_started = false;
struct intel_excl_states *xl;
xl = &excl_cntrs->states[tid];
if (!xl->sched_started)
xl->state[hwc->idx] = INTEL_EXCL_UNUSED;
if (!xl->sched_started)
#define CAMELLIA_F(xl, xr, kl, kr, yl, yr, il, ir, t0, t1) ({ \
il = xl ^ kl; \
#define CAMELLIA_ROUNDSM(xl, xr, kl, kr, yl, yr, il, ir) ({ \
il = camellia_sp1110[(u8)(xl >> 24)]; \
il ^= camellia_sp0222[(u8)(xl >> 16)]; \
il ^= camellia_sp3033[(u8)(xl >> 8)]; \
il ^= camellia_sp4404[(u8)xl]; \
#define RAZWI_INITIATOR_ID_X_Y(xl, yl, xh) \
(RAZWI_INITIATOR_ID_X_Y_LOW(xl, yl) | RAZWI_INITIATOR_ID_X_HIGH(xh))
unsigned int xl = acsr & ACCR_XL_MASK;
pr_info("RJK: parent_rate=%lu, xl=%u, xn=%u\n", parent_rate, xl, xn);
return t ? parent_rate * xl * xn : parent_rate * xl;
u8 xl;
x = (((int)regs.point[i].xh & 0xf) << 8) + regs.point[i].xl;
u32 xl_bit_time_tqmin = can_bit_time_tqmin(&priv->xl.data_bittiming);
else if (btc == priv->xl.data_bittiming_const &&
const struct can_pwm_const *pwm_const = priv->xl.pwm_const;
struct can_pwm *pwm = &priv->xl.pwm;
u32 xl_tqmin = can_bit_time_tqmin(&priv->xl.data_bittiming);
&priv->xl.data_bittiming) ||
priv->xl.data_bittiming_const) ||
priv->xl.data_bitrate_const,
priv->xl.data_bitrate_const_cnt) ||
memset(&priv->xl.data_bittiming, 0,
memset(&priv->xl.tdc, 0, sizeof(priv->xl.tdc));
memset(&priv->xl.pwm, 0, sizeof(priv->xl.pwm));
dbt_params = &priv->xl;
const struct can_pwm_const *pwm_const = priv->xl.pwm_const;
priv->xl.pwm = pwm;
size += can_data_bittiming_get_size(&priv->xl,
size += can_pwm_get_size(priv->xl.pwm_const, /* IFLA_CAN_XL_PWM */
dbt_params = &priv->xl;
const struct can_pwm_const *pwm_const = priv->xl.pwm_const;
const struct can_pwm *pwm = &priv->xl.pwm;
dummy_can_print_bittiming(dev, &can_priv->xl.data_bittiming);
dummy_can_print_tdc(dev, &can_priv->xl.tdc);
dummy_can_print_pwm(dev, &can_priv->xl.pwm,
&can_priv->xl.data_bittiming);
priv->can.xl.data_bittiming_const = &dummy_can_xl_databittiming_const;
priv->can.xl.tdc_const = &dummy_can_xl_tdc_const;
priv->can.xl.pwm_const = &dummy_can_pwm_const;
struct ocfs2_xattr_tree_list *xl = (struct ocfs2_xattr_tree_list *)para;
xl->buffer,
xl->buffer_size,
&xl->result,
struct ocfs2_xattr_tree_list xl = {
ocfs2_list_xattr_tree_rec, &xl);
ret = xl.result;
struct data_bittiming_params fd, xl;
#define __FP_CLZ_2(R, xh, xl) \
__FP_CLZ(R,xl); \
#define __FP_FRAC_ADDI_2(xh, xl, i) \
(xh += ((xl += i) < i))
#define __FP_FRAC_ADD_2(rh, rl, xh, xl, yh, yl) \
(rh = xh + yh + ((rl = xl + yl) < xl))
#define __FP_FRAC_SUB_2(rh, rl, xh, xl, yh, yl) \
(rh = xh - yh - ((rl = xl - yl) > xl))
#define __FP_FRAC_DEC_2(xh, xl, yh, yl) \
UWtype _t = xl; \
xh -= yh + ((xl -= yl) > _t); \
#define __FP_FRAC_ADDI_2(xh, xl, i) add_ssaaaa(xh, xl, xh, xl, 0, i)
#define __FP_FRAC_DEC_2(xh, xl, yh, yl) sub_ddmmss(xh, xl, xh, xl, yh, yl)
#define umul_ppmm(xh, xl, m0, m1) \
(xh) = __xx.__i.__h; (xl) = __xx.__i.__l; \
#define umul_ppmm(xh, xl, m0, m1) \
(xh) = __xx.__i.__h; (xl) = __xx.__i.__l; \
#define umul_ppmm(xh, xl, m0, m1) \
: "=r" ((USItype)(xl)) \
#define umul_ppmm(xh, xl, a, b) \
"=r" (xl) \
#define umul_ppmm(xh, xl, a, b) \
"=&r" (xl) \
#define umul_ppmm(xh, xl, m0, m1) \
(xh) = __xx.__i.__h; (xl) = __xx.__i.__l; \
#define smul_ppmm(xh, xl, m0, m1) \
(xh) = __xx.__i.__h; (xl) = __xx.__i.__l; \
#define umul_ppmm(xh, xl, a, b) \
: "=&d" ((USItype)(xh)), "=&d" ((USItype)(xl)), \
#define umul_ppmm(xh, xl, m0, m1) \
"=q" ((USItype)(xl)) \
#define smul_ppmm(xh, xl, m0, m1) \
"=q" ((SItype)(xl)) \