drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c

462

if (!bw_params->wm_table.entries[i].valid)

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c

466

(uint8_t)bw_params->wm_table.entries[i].wm_inst;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c

468

(uint8_t)bw_params->wm_table.entries[i].wm_type;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c

685

bw_params->wm_table.entries[wm_idx].wm_inst = wm_idx;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c

688

bw_params->wm_table.entries[wm_idx].valid = false;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c

692

bw_params->wm_table.entries[wm_idx].wm_type = WM_TYPE_PSTATE_CHG;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c

693

bw_params->wm_table.entries[wm_idx].valid = true;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c

752

rn_bw_params.wm_table = lpddr4_wm_table_with_disabled_ppt;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c

755

rn_bw_params.wm_table = lpddr4_wm_table_gs;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c

757

rn_bw_params.wm_table = lpddr4_wm_table_rn;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c

761

rn_bw_params.wm_table = ddr4_wm_table_gs;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c

764

rn_bw_params.wm_table = ddr4_1R_wm_table_rn;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c

766

rn_bw_params.wm_table = ddr4_wm_table_rn;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.h

33

extern struct wm_table ddr4_wm_table_gs;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.h

34

extern struct wm_table lpddr4_wm_table_gs;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.h

35

extern struct wm_table lpddr4_wm_table_with_disabled_ppt;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.h

36

extern struct wm_table ddr4_wm_table_rn;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.h

37

extern struct wm_table ddr4_1R_wm_table_rn;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.h

38

extern struct wm_table lpddr4_wm_table_rn;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/dcn30_clk_mgr.c

347

if (clk_mgr->base.bw_params->wm_table.nv_entries[i].valid) {

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/dcn30_clk_mgr.c

348

table->Watermarks.WatermarkRow[WM_DCEFCLK][i].MinClock = clk_mgr->base.bw_params->wm_table.nv_entries[i].pmfw_breakdown.min_dcfclk;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/dcn30_clk_mgr.c

349

table->Watermarks.WatermarkRow[WM_DCEFCLK][i].MaxClock = clk_mgr->base.bw_params->wm_table.nv_entries[i].pmfw_breakdown.max_dcfclk;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/dcn30_clk_mgr.c

350

table->Watermarks.WatermarkRow[WM_DCEFCLK][i].MinUclk = clk_mgr->base.bw_params->wm_table.nv_entries[i].pmfw_breakdown.min_uclk;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/dcn30_clk_mgr.c

351

table->Watermarks.WatermarkRow[WM_DCEFCLK][i].MaxUclk = clk_mgr->base.bw_params->wm_table.nv_entries[i].pmfw_breakdown.max_uclk;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/dcn30_clk_mgr.c

353

table->Watermarks.WatermarkRow[WM_DCEFCLK][i].Flags = clk_mgr->base.bw_params->wm_table.nv_entries[i].pmfw_breakdown.wm_type;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/vg_clk_mgr.c

394

if (!bw_params->wm_table.entries[i].valid)

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/vg_clk_mgr.c

399

(uint8_t)bw_params->wm_table.entries[i].wm_inst;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/vg_clk_mgr.c

401

(uint8_t)bw_params->wm_table.entries[i].wm_type;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/vg_clk_mgr.c

625

bw_params->wm_table.entries[entry_idx].wm_inst = entry_idx;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/vg_clk_mgr.c

628

bw_params->wm_table.entries[entry_idx].valid = false;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/vg_clk_mgr.c

632

bw_params->wm_table.entries[entry_idx].wm_type = WM_TYPE_PSTATE_CHG;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/vg_clk_mgr.c

633

bw_params->wm_table.entries[entry_idx].valid = true;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/vg_clk_mgr.c

743

vg_bw_params.wm_table = lpddr5_wm_table;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/vg_clk_mgr.c

745

vg_bw_params.wm_table = ddr4_wm_table;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/vg_clk_mgr.h

32

extern struct wm_table ddr4_wm_table;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/vg_clk_mgr.h

33

extern struct wm_table lpddr5_wm_table;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/dcn31_clk_mgr.c

348

static struct wm_table ddr5_wm_table = {

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/dcn31_clk_mgr.c

385

static struct wm_table lpddr5_wm_table = {

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/dcn31_clk_mgr.c

434

if (!bw_params->wm_table.entries[i].valid)

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/dcn31_clk_mgr.c

438

(uint8_t)bw_params->wm_table.entries[i].wm_inst;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/dcn31_clk_mgr.c

440

(uint8_t)bw_params->wm_table.entries[i].wm_type;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/dcn31_clk_mgr.c

628

bw_params->wm_table.entries[entry_idx].wm_inst = entry_idx;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/dcn31_clk_mgr.c

631

bw_params->wm_table.entries[entry_idx].valid = false;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/dcn31_clk_mgr.c

635

bw_params->wm_table.entries[entry_idx].wm_type = WM_TYPE_PSTATE_CHG;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/dcn31_clk_mgr.c

636

bw_params->wm_table.entries[entry_idx].valid = true;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/dcn31_clk_mgr.c

737

dcn31_bw_params.wm_table = lpddr5_wm_table;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/dcn31_clk_mgr.c

739

dcn31_bw_params.wm_table = ddr5_wm_table;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/dcn314_clk_mgr.c

414

static struct wm_table ddr5_wm_table = {

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/dcn314_clk_mgr.c

451

static struct wm_table lpddr5_wm_table = {

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/dcn314_clk_mgr.c

505

if (!bw_params->wm_table.entries[i].valid)

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/dcn314_clk_mgr.c

509

(uint8_t)bw_params->wm_table.entries[i].wm_inst;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/dcn314_clk_mgr.c

511

(uint8_t)bw_params->wm_table.entries[i].wm_type;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/dcn314_clk_mgr.c

756

bw_params->wm_table.entries[entry_idx].wm_inst = entry_idx;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/dcn314_clk_mgr.c

759

bw_params->wm_table.entries[entry_idx].valid = false;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/dcn314_clk_mgr.c

763

bw_params->wm_table.entries[entry_idx].wm_type = WM_TYPE_PSTATE_CHG;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/dcn314_clk_mgr.c

764

bw_params->wm_table.entries[entry_idx].valid = true;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/dcn314_clk_mgr.c

854

dcn314_bw_params.wm_table = lpddr5_wm_table;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/dcn314_clk_mgr.c

856

dcn314_bw_params.wm_table = ddr5_wm_table;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/dcn315_clk_mgr.c

310

static struct wm_table ddr5_wm_table = {

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/dcn315_clk_mgr.c

347

static struct wm_table lpddr5_wm_table = {

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/dcn315_clk_mgr.c

396

if (!bw_params->wm_table.entries[i].valid)

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/dcn315_clk_mgr.c

401

(uint8_t)bw_params->wm_table.entries[i].wm_inst;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/dcn315_clk_mgr.c

403

(uint8_t)bw_params->wm_table.entries[i].wm_type;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/dcn315_clk_mgr.c

583

bw_params->wm_table.entries[entry_idx].wm_inst = entry_idx;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/dcn315_clk_mgr.c

586

bw_params->wm_table.entries[entry_idx].valid = false;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/dcn315_clk_mgr.c

590

bw_params->wm_table.entries[entry_idx].wm_type = WM_TYPE_PSTATE_CHG;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/dcn315_clk_mgr.c

591

bw_params->wm_table.entries[entry_idx].valid = true;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/dcn315_clk_mgr.c

667

dcn315_bw_params.wm_table = lpddr5_wm_table;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/dcn315_clk_mgr.c

669

dcn315_bw_params.wm_table = ddr5_wm_table;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/dcn316_clk_mgr.c

276

static struct wm_table ddr4_wm_table = {

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/dcn316_clk_mgr.c

313

static struct wm_table lpddr5_wm_table = {

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/dcn316_clk_mgr.c

362

if (!bw_params->wm_table.entries[i].valid)

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/dcn316_clk_mgr.c

367

(uint8_t)bw_params->wm_table.entries[i].wm_inst;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/dcn316_clk_mgr.c

369

(uint8_t)bw_params->wm_table.entries[i].wm_type;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/dcn316_clk_mgr.c

563

bw_params->wm_table.entries[entry_idx].wm_inst = entry_idx;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/dcn316_clk_mgr.c

566

bw_params->wm_table.entries[entry_idx].valid = false;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/dcn316_clk_mgr.c

570

bw_params->wm_table.entries[entry_idx].wm_type = WM_TYPE_PSTATE_CHG;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/dcn316_clk_mgr.c

571

bw_params->wm_table.entries[entry_idx].valid = true;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/dcn316_clk_mgr.c

651

dcn316_bw_params.wm_table = lpddr5_wm_table;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/dcn316_clk_mgr.c

653

dcn316_bw_params.wm_table = ddr4_wm_table;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c

1001

if (clk_mgr->base.bw_params->wm_table.nv_entries[i].valid) {

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c

1003

table->Watermarks.WatermarkRow[i].Flags = clk_mgr->base.bw_params->wm_table.nv_entries[i].pmfw_breakdown.wm_type;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c

1201

bw_params->wm_table.entries[entry_idx].wm_inst = entry_idx;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c

1204

bw_params->wm_table.entries[entry_idx].valid = false;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c

1208

bw_params->wm_table.entries[entry_idx].wm_type = WM_TYPE_PSTATE_CHG;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c

1209

bw_params->wm_table.entries[entry_idx].valid = true;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c

1492

dcn35_bw_params.wm_table = lpddr5_wm_table;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c

1494

dcn35_bw_params.wm_table = ddr5_wm_table;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c

782

static struct wm_table ddr5_wm_table = {

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c

819

static struct wm_table lpddr5_wm_table = {

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c

891

if (!bw_params->wm_table.entries[i].valid)

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c

895

(uint8_t)bw_params->wm_table.entries[i].wm_inst;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c

897

(uint8_t)bw_params->wm_table.entries[i].wm_type;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c

1341

if (clk_mgr->base.bw_params->wm_table.nv_entries[i].valid) {

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c

1343

table->Watermarks.WatermarkRow[i].Flags = clk_mgr->base.bw_params->wm_table.nv_entries[i].pmfw_breakdown.wm_type;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c

189

clk_mgr->bw_params->wm_table.nv_entries[WM_A].valid = true;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c

190

clk_mgr->bw_params->wm_table.nv_entries[WM_A].pmfw_breakdown.wm_type = WATERMARKS_CLOCK_RANGE;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c

191

clk_mgr->bw_params->wm_table.nv_entries[WM_A].pmfw_breakdown.min_dcfclk = (uint16_t)min_dcfclk_mhz;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c

192

clk_mgr->bw_params->wm_table.nv_entries[WM_A].pmfw_breakdown.max_dcfclk = 0xFFFF;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c

193

clk_mgr->bw_params->wm_table.nv_entries[WM_A].pmfw_breakdown.min_uclk = (uint16_t)min_uclk_mhz;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c

194

clk_mgr->bw_params->wm_table.nv_entries[WM_A].pmfw_breakdown.max_uclk = 0xFFFF;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c

197

clk_mgr->bw_params->wm_table.nv_entries[WM_B].valid = false;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c

202

clk_mgr->bw_params->wm_table.nv_entries[WM_1A].valid = true;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c

203

clk_mgr->bw_params->wm_table.nv_entries[WM_1A].pmfw_breakdown.wm_type = WATERMARKS_DUMMY_PSTATE;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c

204

clk_mgr->bw_params->wm_table.nv_entries[WM_1A].pmfw_breakdown.min_dcfclk = (uint16_t)min_dcfclk_mhz;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c

205

clk_mgr->bw_params->wm_table.nv_entries[WM_1A].pmfw_breakdown.max_dcfclk = 0xFFFF;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c

206

clk_mgr->bw_params->wm_table.nv_entries[WM_1A].pmfw_breakdown.min_uclk = (uint16_t)min_uclk_mhz;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c

207

clk_mgr->bw_params->wm_table.nv_entries[WM_1A].pmfw_breakdown.max_uclk = 0xFFFF;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c

209

clk_mgr->bw_params->wm_table.nv_entries[WM_1A].valid = false;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c

213

clk_mgr->bw_params->wm_table.nv_entries[WM_1B].valid = false;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn42/dcn42_clk_mgr.c

649

if (!bw_params->wm_table.entries[i].valid)

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn42/dcn42_clk_mgr.c

653

(uint8_t)bw_params->wm_table.entries[i].wm_inst;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn42/dcn42_clk_mgr.c

655

(uint8_t)bw_params->wm_table.entries[i].wm_type;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn42/dcn42_clk_mgr.c

709

if (clk_mgr_base->bw_params->wm_table.entries[WM_A].valid == true)

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn42/dcn42_clk_mgr.c

727

clk_mgr_base->bw_params->wm_table.entries[i].wm_inst = i;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn42/dcn42_clk_mgr.c

730

clk_mgr_base->bw_params->wm_table.entries[i].valid = false;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn42/dcn42_clk_mgr.c

733

clk_mgr_base->bw_params->wm_table.entries[i].wm_type = WM_TYPE_PSTATE_CHG;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn42/dcn42_clk_mgr.c

734

clk_mgr_base->bw_params->wm_table.entries[i].valid = true;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn42b/dcn42b_clk_mgr.c

258

static struct wm_table ddr5_wm_table = {

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn42b/dcn42b_clk_mgr.c

295

static struct wm_table lpddr5_wm_table = {

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn42b/dcn42b_clk_mgr.c

453

dcn42b_bw_params.wm_table = lpddr5_wm_table;

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn42b/dcn42b_clk_mgr.c

455

dcn42b_bw_params.wm_table = ddr5_wm_table;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

2192

dc->clk_mgr->bw_params->wm_table.entries[i].sr_exit_time_us =

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

2199

dc->clk_mgr->bw_params->wm_table.entries[i].sr_enter_plus_exit_time_us =

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

2210

dc->clk_mgr->bw_params->wm_table.entries[i].pstate_latency_us =

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

2306

table_entry = &bw_params->wm_table.entries[WM_D];

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

2314

table_entry = &bw_params->wm_table.entries[WM_C];

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

2319

table_entry = &bw_params->wm_table.entries[WM_B];

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

2325

table_entry = &bw_params->wm_table.entries[WM_A];

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

2480

bw_params->wm_table.entries[WM_D].pstate_latency_us = LPDDR_MEM_RETRAIN_LATENCY;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

2481

bw_params->wm_table.entries[WM_D].wm_inst = WM_D;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

2482

bw_params->wm_table.entries[WM_D].wm_type = WM_TYPE_RETRAINING;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

2483

bw_params->wm_table.entries[WM_D].valid = true;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

767

struct wm_table ddr4_wm_table_gs = {

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

804

struct wm_table lpddr4_wm_table_gs = {

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

841

struct wm_table lpddr4_wm_table_with_disabled_ppt = {

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

878

struct wm_table ddr4_wm_table_rn = {

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

915

struct wm_table ddr4_1R_wm_table_rn = {

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

952

struct wm_table lpddr4_wm_table_rn = {

drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c

298

if (dc->clk_mgr->bw_params->wm_table.nv_entries[WM_A].valid) {

drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c

301

context->bw_ctx.dml.soc.dram_clock_change_latency_us = dc->clk_mgr->bw_params->wm_table.nv_entries[WM_A].dml_input.pstate_latency_us;

drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c

302

context->bw_ctx.dml.soc.sr_enter_plus_exit_time_us = dc->clk_mgr->bw_params->wm_table.nv_entries[WM_A].dml_input.sr_enter_plus_exit_time_us;

drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c

303

context->bw_ctx.dml.soc.sr_exit_time_us = dc->clk_mgr->bw_params->wm_table.nv_entries[WM_A].dml_input.sr_exit_time_us;

drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c

346

context->bw_ctx.dml.soc.dram_clock_change_latency_us = dc->clk_mgr->bw_params->wm_table.nv_entries[WM_A].dml_input.pstate_latency_us;

drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c

366

if (dc->clk_mgr->bw_params->wm_table.nv_entries[WM_B].valid) {

drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c

371

context->bw_ctx.dml.soc.dram_clock_change_latency_us = dc->clk_mgr->bw_params->wm_table.nv_entries[WM_B].dml_input.pstate_latency_us;

drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c

372

context->bw_ctx.dml.soc.sr_enter_plus_exit_time_us = dc->clk_mgr->bw_params->wm_table.nv_entries[WM_B].dml_input.sr_enter_plus_exit_time_us;

drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c

373

context->bw_ctx.dml.soc.sr_exit_time_us = dc->clk_mgr->bw_params->wm_table.nv_entries[WM_B].dml_input.sr_exit_time_us;

drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c

413

if (dc->clk_mgr->bw_params->wm_table.nv_entries[WM_C].valid) {

drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c

441

context->bw_ctx.dml.soc.sr_enter_plus_exit_time_us = dc->clk_mgr->bw_params->wm_table.nv_entries[WM_C].dml_input.sr_enter_plus_exit_time_us;

drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c

442

context->bw_ctx.dml.soc.sr_exit_time_us = dc->clk_mgr->bw_params->wm_table.nv_entries[WM_C].dml_input.sr_exit_time_us;

drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c

521

dc->clk_mgr->bw_params->wm_table.nv_entries[WM_A].dml_input.pstate_latency_us;

drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c

675

base->bw_params->wm_table.nv_entries[WM_A].valid = true;

drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c

676

base->bw_params->wm_table.nv_entries[WM_A].dml_input.pstate_latency_us = pstate_latency_us;

drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c

677

base->bw_params->wm_table.nv_entries[WM_A].dml_input.sr_exit_time_us = sr_exit_time_us;

drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c

678

base->bw_params->wm_table.nv_entries[WM_A].dml_input.sr_enter_plus_exit_time_us = sr_enter_plus_exit_time_us;

drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c

679

base->bw_params->wm_table.nv_entries[WM_A].pmfw_breakdown.wm_type = WATERMARKS_CLOCK_RANGE;

drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c

680

base->bw_params->wm_table.nv_entries[WM_A].pmfw_breakdown.min_dcfclk = 0;

drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c

681

base->bw_params->wm_table.nv_entries[WM_A].pmfw_breakdown.max_dcfclk = 0xFFFF;

drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c

682

base->bw_params->wm_table.nv_entries[WM_A].pmfw_breakdown.min_uclk = min_uclk_mhz;

drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c

683

base->bw_params->wm_table.nv_entries[WM_A].pmfw_breakdown.max_uclk = 0xFFFF;

drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c

697

base->bw_params->wm_table.nv_entries[WM_C].valid = true;

drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c

698

base->bw_params->wm_table.nv_entries[WM_C].dml_input.pstate_latency_us = 0;

drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c

699

base->bw_params->wm_table.nv_entries[WM_C].dml_input.sr_exit_time_us = sr_exit_time_us;

drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c

700

base->bw_params->wm_table.nv_entries[WM_C].dml_input.sr_enter_plus_exit_time_us = sr_enter_plus_exit_time_us;

drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c

701

base->bw_params->wm_table.nv_entries[WM_C].pmfw_breakdown.wm_type = WATERMARKS_DUMMY_PSTATE;

drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c

702

base->bw_params->wm_table.nv_entries[WM_C].pmfw_breakdown.min_dcfclk = 0;

drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c

703

base->bw_params->wm_table.nv_entries[WM_C].pmfw_breakdown.max_dcfclk = 0xFFFF;

drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c

704

base->bw_params->wm_table.nv_entries[WM_C].pmfw_breakdown.min_uclk = min_uclk_mhz;

drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c

705

base->bw_params->wm_table.nv_entries[WM_C].pmfw_breakdown.max_uclk = 0xFFFF;

drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c

716

base->bw_params->wm_table.nv_entries[WM_D].valid = true;

drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c

717

base->bw_params->wm_table.nv_entries[WM_D].dml_input.pstate_latency_us = pstate_latency_us;

drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c

718

base->bw_params->wm_table.nv_entries[WM_D].dml_input.sr_exit_time_us = 2;

drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c

719

base->bw_params->wm_table.nv_entries[WM_D].dml_input.sr_enter_plus_exit_time_us = 4;

drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c

720

base->bw_params->wm_table.nv_entries[WM_D].pmfw_breakdown.wm_type = WATERMARKS_MALL;

drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c

721

base->bw_params->wm_table.nv_entries[WM_D].pmfw_breakdown.min_dcfclk = 0;

drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c

722

base->bw_params->wm_table.nv_entries[WM_D].pmfw_breakdown.max_dcfclk = 0xFFFF;

drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c

723

base->bw_params->wm_table.nv_entries[WM_D].pmfw_breakdown.min_uclk = min_uclk_mhz;

drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c

724

base->bw_params->wm_table.nv_entries[WM_D].pmfw_breakdown.max_uclk = 0xFFFF;

drivers/gpu/drm/amd/display/dc/dml/dcn301/dcn301_fpu.c

218

struct wm_table ddr4_wm_table = {

drivers/gpu/drm/amd/display/dc/dml/dcn301/dcn301_fpu.c

255

struct wm_table lpddr5_wm_table = {

drivers/gpu/drm/amd/display/dc/dml/dcn301/dcn301_fpu.c

444

table_entry = &bw_params->wm_table.entries[WM_D];

drivers/gpu/drm/amd/display/dc/dml/dcn301/dcn301_fpu.c

452

table_entry = &bw_params->wm_table.entries[WM_C];

drivers/gpu/drm/amd/display/dc/dml/dcn301/dcn301_fpu.c

457

table_entry = &bw_params->wm_table.entries[WM_B];

drivers/gpu/drm/amd/display/dc/dml/dcn301/dcn301_fpu.c

463

table_entry = &bw_params->wm_table.entries[WM_A];

drivers/gpu/drm/amd/display/dc/dml/dcn31/dcn31_fpu.c

458

if (dc->clk_mgr->bw_params->wm_table.entries[WM_A].valid) {

drivers/gpu/drm/amd/display/dc/dml/dcn31/dcn31_fpu.c

459

context->bw_ctx.dml.soc.dram_clock_change_latency_us = dc->clk_mgr->bw_params->wm_table.entries[WM_A].pstate_latency_us;

drivers/gpu/drm/amd/display/dc/dml/dcn31/dcn31_fpu.c

460

context->bw_ctx.dml.soc.sr_enter_plus_exit_time_us = dc->clk_mgr->bw_params->wm_table.entries[WM_A].sr_enter_plus_exit_time_us;

drivers/gpu/drm/amd/display/dc/dml/dcn31/dcn31_fpu.c

461

context->bw_ctx.dml.soc.sr_exit_time_us = dc->clk_mgr->bw_params->wm_table.entries[WM_A].sr_exit_time_us;

drivers/gpu/drm/amd/display/dc/dml/dcn31/dcn31_fpu.c

469

if (dc->clk_mgr->bw_params->wm_table.entries[WM_A].valid) {

drivers/gpu/drm/amd/display/dc/dml/dcn31/dcn31_fpu.c

474

context->bw_ctx.dml.soc.dram_clock_change_latency_us = dc->clk_mgr->bw_params->wm_table.entries[WM_A].pstate_latency_us;

drivers/gpu/drm/amd/display/dc/dml/dcn31/dcn31_fpu.c

476

dc->clk_mgr->bw_params->wm_table.entries[WM_A].sr_enter_plus_exit_time_us;

drivers/gpu/drm/amd/display/dc/dml/dcn31/dcn31_fpu.c

478

dc->clk_mgr->bw_params->wm_table.entries[WM_A].sr_exit_time_us;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

204

clk_mgr->base.bw_params->wm_table.nv_entries[WM_B].pmfw_breakdown.min_dcfclk =

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

207

clk_mgr->base.bw_params->wm_table.nv_entries[WM_B].pmfw_breakdown.min_dcfclk =

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

214

clk_mgr->base.bw_params->wm_table.nv_entries[WM_A].valid = true;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

215

clk_mgr->base.bw_params->wm_table.nv_entries[WM_A].dml_input.pstate_latency_us = pstate_latency_us;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

216

clk_mgr->base.bw_params->wm_table.nv_entries[WM_A].dml_input.fclk_change_latency_us = fclk_change_latency_us;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

217

clk_mgr->base.bw_params->wm_table.nv_entries[WM_A].dml_input.sr_exit_time_us = sr_exit_time_us;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

218

clk_mgr->base.bw_params->wm_table.nv_entries[WM_A].dml_input.sr_enter_plus_exit_time_us = sr_enter_plus_exit_time_us;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

219

clk_mgr->base.bw_params->wm_table.nv_entries[WM_A].pmfw_breakdown.wm_type = WATERMARKS_CLOCK_RANGE;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

220

clk_mgr->base.bw_params->wm_table.nv_entries[WM_A].pmfw_breakdown.min_dcfclk = min_dcfclk_mhz;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

221

clk_mgr->base.bw_params->wm_table.nv_entries[WM_A].pmfw_breakdown.max_dcfclk = 0xFFFF;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

222

clk_mgr->base.bw_params->wm_table.nv_entries[WM_A].pmfw_breakdown.min_uclk = min_uclk_mhz;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

223

clk_mgr->base.bw_params->wm_table.nv_entries[WM_A].pmfw_breakdown.max_uclk = 0xFFFF;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

226

clk_mgr->base.bw_params->wm_table.nv_entries[WM_B].valid = true;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

227

clk_mgr->base.bw_params->wm_table.nv_entries[WM_B].dml_input.pstate_latency_us = pstate_latency_us;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

228

clk_mgr->base.bw_params->wm_table.nv_entries[WM_B].dml_input.fclk_change_latency_us = fclk_change_latency_us;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

229

clk_mgr->base.bw_params->wm_table.nv_entries[WM_B].dml_input.sr_exit_time_us = sr_exit_time_us;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

230

clk_mgr->base.bw_params->wm_table.nv_entries[WM_B].dml_input.sr_enter_plus_exit_time_us = sr_enter_plus_exit_time_us;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

231

clk_mgr->base.bw_params->wm_table.nv_entries[WM_B].pmfw_breakdown.wm_type = WATERMARKS_CLOCK_RANGE;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

232

clk_mgr->base.bw_params->wm_table.nv_entries[WM_B].pmfw_breakdown.max_dcfclk = 0xFFFF;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

2320

dc->clk_mgr->bw_params->wm_table.nv_entries[WM_A].dml_input.pstate_latency_us;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

233

clk_mgr->base.bw_params->wm_table.nv_entries[WM_B].pmfw_breakdown.min_uclk = setb_min_uclk_mhz;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

234

clk_mgr->base.bw_params->wm_table.nv_entries[WM_B].pmfw_breakdown.max_uclk = 0xFFFF;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

2358

dc->clk_mgr->bw_params->wm_table.nv_entries[WM_A].dml_input.pstate_latency_us;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

2388

context->bw_ctx.dml.soc.fclk_change_latency_us = dc->clk_mgr->bw_params->wm_table.nv_entries[WM_A].dml_input.fclk_change_latency_us;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

239

clk_mgr->base.bw_params->wm_table.nv_entries[WM_C].valid = true;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

240

clk_mgr->base.bw_params->wm_table.nv_entries[WM_C].dml_input.pstate_latency_us = 50;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

241

clk_mgr->base.bw_params->wm_table.nv_entries[WM_C].dml_input.fclk_change_latency_us = fclk_change_latency_us;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

2412

if (dc->clk_mgr->bw_params->wm_table.nv_entries[WM_B].valid) {

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

2413

context->bw_ctx.dml.soc.dram_clock_change_latency_us = dc->clk_mgr->bw_params->wm_table.nv_entries[WM_B].dml_input.pstate_latency_us;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

2414

context->bw_ctx.dml.soc.fclk_change_latency_us = dc->clk_mgr->bw_params->wm_table.nv_entries[WM_B].dml_input.fclk_change_latency_us;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

2415

context->bw_ctx.dml.soc.sr_enter_plus_exit_time_us = dc->clk_mgr->bw_params->wm_table.nv_entries[WM_B].dml_input.sr_enter_plus_exit_time_us;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

2416

context->bw_ctx.dml.soc.sr_exit_time_us = dc->clk_mgr->bw_params->wm_table.nv_entries[WM_B].dml_input.sr_exit_time_us;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

242

clk_mgr->base.bw_params->wm_table.nv_entries[WM_C].dml_input.sr_exit_time_us = sr_exit_time_us;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

243

clk_mgr->base.bw_params->wm_table.nv_entries[WM_C].dml_input.sr_enter_plus_exit_time_us = sr_enter_plus_exit_time_us;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

244

clk_mgr->base.bw_params->wm_table.nv_entries[WM_C].pmfw_breakdown.wm_type = WATERMARKS_DUMMY_PSTATE;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

245

clk_mgr->base.bw_params->wm_table.nv_entries[WM_C].pmfw_breakdown.min_dcfclk = min_dcfclk_mhz;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

246

clk_mgr->base.bw_params->wm_table.nv_entries[WM_C].pmfw_breakdown.max_dcfclk = 0xFFFF;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

247

clk_mgr->base.bw_params->wm_table.nv_entries[WM_C].pmfw_breakdown.min_uclk = min_uclk_mhz;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

248

clk_mgr->base.bw_params->wm_table.nv_entries[WM_C].pmfw_breakdown.max_uclk = 0xFFFF;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

2481

if (dc->clk_mgr->bw_params->wm_table.nv_entries[WM_C].valid) {

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

2509

context->bw_ctx.dml.soc.fclk_change_latency_us = dc->clk_mgr->bw_params->wm_table.nv_entries[WM_C].dml_input.fclk_change_latency_us;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

2510

context->bw_ctx.dml.soc.sr_enter_plus_exit_time_us = dc->clk_mgr->bw_params->wm_table.nv_entries[WM_C].dml_input.sr_enter_plus_exit_time_us;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

2511

context->bw_ctx.dml.soc.sr_exit_time_us = dc->clk_mgr->bw_params->wm_table.nv_entries[WM_C].dml_input.sr_exit_time_us;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

2529

if ((!pstate_en) && (dc->clk_mgr->bw_params->wm_table.nv_entries[WM_C].valid)) {

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

2549

context->bw_ctx.dml.soc.dram_clock_change_latency_us = dc->clk_mgr->bw_params->wm_table.nv_entries[WM_A].dml_input.pstate_latency_us;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

2550

context->bw_ctx.dml.soc.sr_enter_plus_exit_time_us = dc->clk_mgr->bw_params->wm_table.nv_entries[WM_A].dml_input.sr_enter_plus_exit_time_us;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

2551

context->bw_ctx.dml.soc.sr_exit_time_us = dc->clk_mgr->bw_params->wm_table.nv_entries[WM_A].dml_input.sr_exit_time_us;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

2599

dc->clk_mgr->bw_params->wm_table.nv_entries[WM_A].dml_input.pstate_latency_us;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

260

clk_mgr->base.bw_params->wm_table.nv_entries[WM_D].valid = true;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

2604

dc->clk_mgr->bw_params->wm_table.nv_entries[WM_A].dml_input.fclk_change_latency_us;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

261

clk_mgr->base.bw_params->wm_table.nv_entries[WM_D].dml_input.pstate_latency_us = clk_mgr->base.bw_params->dummy_pstate_table[3].dummy_pstate_latency_us;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

262

clk_mgr->base.bw_params->wm_table.nv_entries[WM_D].dml_input.fclk_change_latency_us = fclk_change_latency_us;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

263

clk_mgr->base.bw_params->wm_table.nv_entries[WM_D].dml_input.sr_exit_time_us = sr_exit_time_us / 2; // TBD

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

264

clk_mgr->base.bw_params->wm_table.nv_entries[WM_D].dml_input.sr_enter_plus_exit_time_us = sr_enter_plus_exit_time_us / 2; // TBD

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

265

clk_mgr->base.bw_params->wm_table.nv_entries[WM_D].pmfw_breakdown.wm_type = WATERMARKS_MALL;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

266

clk_mgr->base.bw_params->wm_table.nv_entries[WM_D].pmfw_breakdown.min_dcfclk = min_dcfclk_mhz;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

267

clk_mgr->base.bw_params->wm_table.nv_entries[WM_D].pmfw_breakdown.max_dcfclk = 0xFFFF;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

268

clk_mgr->base.bw_params->wm_table.nv_entries[WM_D].pmfw_breakdown.min_uclk = min_uclk_mhz;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

269

clk_mgr->base.bw_params->wm_table.nv_entries[WM_D].pmfw_breakdown.max_uclk = 0xFFFF;

drivers/gpu/drm/amd/display/dc/inc/hw/clk_mgr.h

311

struct wm_table wm_table;

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

4813

Watermarks_t *wm_table = &(data->smc_state_table.water_marks_table);

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c

4818

result = smum_smc_table_manager(hwmgr, (uint8_t *)wm_table, WMTABLE, false);

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega12_hwmgr.c

2566

Watermarks_t *wm_table = &(data->smc_state_table.water_marks_table);

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega12_hwmgr.c

2571

(uint8_t *)wm_table, TABLE_WATERMARKS, false);

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega20_hwmgr.c

3694

Watermarks_t *wm_table = &(data->smc_state_table.water_marks_table);

drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega20_hwmgr.c

3699

(uint8_t *)wm_table, TABLE_WATERMARKS, false);