drivers/net/wireless/intel/iwlwifi/mld/rx.c

1131

IWL_MLD_ENC_EHT_RU(2_2_6, D4);

drivers/pinctrl/aspeed/pinctrl-aspeed-g4.c

196

SIG_EXPR_LIST_DECL_SINGLE(D4, SD1DAT2, SD1, SD1_DESC);

drivers/pinctrl/aspeed/pinctrl-aspeed-g4.c

197

SIG_EXPR_LIST_DECL_SINGLE(D4, SCL12, I2C12, I2C12_DESC);

drivers/pinctrl/aspeed/pinctrl-aspeed-g4.c

198

PIN_DECL_2(D4, GPIOC4, SD1DAT2, SCL12);

drivers/pinctrl/aspeed/pinctrl-aspeed-g4.c

1996

ASPEED_PINCTRL_PIN(D4),

drivers/pinctrl/aspeed/pinctrl-aspeed-g4.c

205

FUNC_GROUP_DECL(I2C12, D4, C3);

drivers/pinctrl/aspeed/pinctrl-aspeed-g4.c

220

FUNC_GROUP_DECL(SD1, C4, B3, A2, E5, D4, C3, B2, A1);

drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c

1218

SIG_EXPR_LIST_DECL_SINGLE(D4, GPIOU3, GPIOU3, SIG_DESC_SET(SCUA0, 11));

drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c

1219

SIG_EXPR_LIST_DECL_SINGLE(D4, RMII2DASH1, RMII2, RMII2_DESC);

drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c

1220

SIG_EXPR_LIST_DECL_SINGLE(D4, RGMII2TXD3, RGMII2);

drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c

1221

PIN_DECL_(D4, SIG_EXPR_LIST_PTR(D4, GPIOU3), SIG_EXPR_LIST_PTR(D4, RMII2DASH1),

drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c

1222

SIG_EXPR_LIST_PTR(D4, RGMII2TXD3));

drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c

1311

FUNC_GROUP_DECL(RGMII2, B2, B1, A2, B3, D5, D4, C2, C1, C3, D1, D2, E6);

drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c

1987

ASPEED_PINCTRL_PIN(D4),

drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c

2552

ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_PULL_DOWN, B2, D4, SCU90, 14),

drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c

2553

ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_DISABLE, B2, D4, SCU90, 14),

drivers/pinctrl/aspeed/pinctrl-aspeed-g6.c

1382

SIG_EXPR_LIST_DECL_SESG(D4, RGMII2TXCK, RGMII2, SIG_DESC_SET(SCU400, 12),

drivers/pinctrl/aspeed/pinctrl-aspeed-g6.c

1384

SIG_EXPR_LIST_DECL_SESG(D4, RMII2RCLKO, RMII2, SIG_DESC_SET(SCU400, 12),

drivers/pinctrl/aspeed/pinctrl-aspeed-g6.c

1386

PIN_DECL_2(D4, GPIO18B4, RGMII2TXCK, RMII2RCLKO);

drivers/pinctrl/aspeed/pinctrl-aspeed-g6.c

1459

FUNC_GROUP_DECL(RGMII2, D4, C2, C1, D3, E4, F5, D2, E3, D1, F4, E2, E1);

drivers/pinctrl/aspeed/pinctrl-aspeed-g6.c

1460

FUNC_GROUP_DECL(RMII2, D4, C2, C1, D3, D2, D1, F4, E2, E1);

drivers/pinctrl/aspeed/pinctrl-aspeed-g6.c

1810

ASPEED_PINCTRL_PIN(D4),

drivers/pinctrl/pinctrl-pic32.c

975

PIC32_PINCTRL_GROUP(52, D4,

drivers/pinctrl/renesas/pfc-r8a77470.c

604

PINMUX_IPSR_GPSR(IP1_27_24, D4),

drivers/pinctrl/renesas/pfc-r8a7778.c

688

PINMUX_IPSR_NOGP(IP2_22, D4),

drivers/pinctrl/renesas/pfc-r8a7779.c

67

PIN_NOGP_CFG(D4, "D4", fn, SH_PFC_PIN_CFG_PULL_UP), \

drivers/pinctrl/renesas/pfc-r8a7790.c

827

PINMUX_IPSR_GPSR(IP0_15_12, D4),

drivers/pinctrl/renesas/pfc-r8a7791.c

843

PINMUX_IPSR_GPSR(IP0_4, D4),

drivers/pinctrl/renesas/pfc-r8a7792.c

361

PINMUX_SINGLE(D4),

drivers/pinctrl/renesas/pfc-r8a7794.c

789

PINMUX_IPSR_GPSR(IP0_29_28, D4),

drivers/pinctrl/renesas/pfc-r8a77951.c

302

#define IP5_31_28 FM(D4) FM(MSIOF2_SCK_B)F_(0, 0) F_(0, 0) FM(VI4_DATA20) FM(VI5_DATA4) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)

drivers/pinctrl/renesas/pfc-r8a77951.c

92

#define GPSR0_4 F_(D4, IP5_31_28)

drivers/pinctrl/renesas/pfc-r8a77951.c

947

PINMUX_IPSR_GPSR(IP5_31_28, D4),

drivers/pinctrl/renesas/pfc-r8a7796.c

307

#define IP5_31_28 FM(D4) FM(MSIOF2_SCK_B)F_(0, 0) F_(0, 0) FM(VI4_DATA20) FM(VI5_DATA4) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)

drivers/pinctrl/renesas/pfc-r8a7796.c

951

PINMUX_IPSR_GPSR(IP5_31_28, D4),

drivers/pinctrl/renesas/pfc-r8a7796.c

97

#define GPSR0_4 F_(D4, IP5_31_28)

drivers/pinctrl/renesas/pfc-r8a77965.c

307

#define IP5_31_28 FM(D4) FM(MSIOF2_SCK_B)F_(0, 0) F_(0, 0) FM(VI4_DATA20) FM(VI5_DATA4) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)

drivers/pinctrl/renesas/pfc-r8a77965.c

953

PINMUX_IPSR_GPSR(IP5_31_28, D4),

drivers/pinctrl/renesas/pfc-r8a77965.c

97

#define GPSR0_4 F_(D4, IP5_31_28)

drivers/pinctrl/renesas/pfc-r8a77970.c

208

#define IP5_23_20 FM(VI1_DATA1) FM(MSIOF1_SS2) F_(0, 0) FM(D4) FM(MMC_CMD) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)

drivers/pinctrl/renesas/pfc-r8a77970.c

588

PINMUX_IPSR_GPSR(IP5_23_20, D4),

drivers/pinctrl/renesas/pfc-r8a77980.c

242

#define IP5_23_20 FM(VI1_DATA1) FM(MSIOF1_SS2) F_(0, 0) FM(D4) FM(MMC_CD) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)

drivers/pinctrl/renesas/pfc-r8a77980.c

666

PINMUX_IPSR_GPSR(IP5_23_20, D4),

drivers/pinctrl/renesas/pfc-r8a77990.c

265

#define IP6_7_4 FM(D4) FM(CANFD1_TX) FM(HSCK3_B) FM(CAN1_TX) FM(RTS3_N_A) FM(MSIOF3_SS2_A) F_(0, 0) FM(VI5_DATA1_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)

drivers/pinctrl/renesas/pfc-r8a77990.c

81

#define GPSR0_4 F_(D4, IP6_7_4)

drivers/pinctrl/renesas/pfc-r8a77990.c

864

PINMUX_IPSR_GPSR(IP6_7_4, D4),

drivers/pinctrl/renesas/pfc-r8a779a0.c

397

#define IP0SR2_15_12 FM(GP2_03) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) FM(D4) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)

drivers/pinctrl/renesas/pfc-r8a779a0.c

950

PINMUX_IPSR_MSEL(IP0SR2_15_12, D4, SEL_I2C0_0),

drivers/pinctrl/renesas/pfc-sh7264.c

1299

GPIO_FN(D4),

drivers/pinctrl/renesas/pfc-sh7269.c

1737

GPIO_FN(D4),

drivers/pinctrl/renesas/pfc-sh7724.c

1403

GPIO_FN(D4),

drivers/pinctrl/renesas/pfc-sh7734.c

1418

GPIO_FN(D4), GPIO_FN(SD0_CD_A), GPIO_FN(MMC_D4_A), GPIO_FN(ST1_D7),

drivers/pinctrl/renesas/pfc-sh7734.c

737

PINMUX_IPSR_GPSR(IP2_2_0, D4),

drivers/pinctrl/renesas/pfc-sh7757.c

1659

GPIO_FN(D4),

lib/842/842_compress.c

52

{ I4, D4, N0, N0, 0x14 }, /* 41 */

lib/842/842_compress.c

53

{ D4, I4, N0, N0, 0x04 }, /* 41 */

lib/842/842_compress.c

54

{ I2, I2, D4, N0, 0x0f }, /* 48 */

lib/842/842_compress.c

56

{ I2, D4, I2, N0, 0x0b }, /* 48 */

lib/842/842_compress.c

59

{ D4, I2, I2, N0, 0x03 }, /* 48 */

lib/842/842_compress.c

60

{ I2, D2, D4, N0, 0x0a }, /* 56 */

lib/842/842_compress.c

61

{ D2, I2, D4, N0, 0x05 }, /* 56 */

lib/842/842_compress.c

62

{ D4, I2, D2, N0, 0x02 }, /* 56 */

lib/842/842_compress.c

63

{ D4, D2, I2, N0, 0x01 }, /* 56 */

lib/842/842_decompress.c

23

{ D4, D2, I2, N0 },

lib/842/842_decompress.c

24

{ D4, I2, D2, N0 },

lib/842/842_decompress.c

25

{ D4, I2, I2, N0 },

lib/842/842_decompress.c

26

{ D4, I4, N0, N0 },

lib/842/842_decompress.c

27

{ D2, I2, D4, N0 },

lib/842/842_decompress.c

32

{ I2, D2, D4, N0 },

lib/842/842_decompress.c

33

{ I2, D4, I2, N0 },

lib/842/842_decompress.c

37

{ I2, I2, D4, N0 },

lib/842/842_decompress.c

42

{ I4, D4, N0, N0 },

lib/zstd/decompress/huf_decompress.c

333

U64 D4;

lib/zstd/decompress/huf_decompress.c

335

D4 = (U64)((symbol << 8) + nbBits);

lib/zstd/decompress/huf_decompress.c

337

D4 = (U64)(symbol + (nbBits << 8));

lib/zstd/decompress/huf_decompress.c

339

assert(D4 < (1U << 16));

lib/zstd/decompress/huf_decompress.c

340

D4 *= 0x0001000100010001ULL;

lib/zstd/decompress/huf_decompress.c

341

return D4;

lib/zstd/decompress/huf_decompress.c

484

U64 const D4 = HUF_DEltX1_set4(wksp->symbols[symbol + s], nbBits);

lib/zstd/decompress/huf_decompress.c

485

MEM_write64(dt + uStart, D4);

lib/zstd/decompress/huf_decompress.c

491

U64 const D4 = HUF_DEltX1_set4(wksp->symbols[symbol + s], nbBits);

lib/zstd/decompress/huf_decompress.c

492

MEM_write64(dt + uStart, D4);

lib/zstd/decompress/huf_decompress.c

493

MEM_write64(dt + uStart + 4, D4);

lib/zstd/decompress/huf_decompress.c

499

U64 const D4 = HUF_DEltX1_set4(wksp->symbols[symbol + s], nbBits);

lib/zstd/decompress/huf_decompress.c

501

MEM_write64(dt + uStart + u + 0, D4);

lib/zstd/decompress/huf_decompress.c

502

MEM_write64(dt + uStart + u + 4, D4);

lib/zstd/decompress/huf_decompress.c

503

MEM_write64(dt + uStart + u + 8, D4);

lib/zstd/decompress/huf_decompress.c

504

MEM_write64(dt + uStart + u + 12, D4);