D12
SIG_EXPR_LIST_DECL_SINGLE(D12, GPIOT3, GPIOT3, SIG_DESC_SET(SCUA0, 3));
SIG_EXPR_LIST_DECL_SINGLE(D12, RMII1TXD1, RMII1, RMII1_DESC);
SIG_EXPR_LIST_DECL_SINGLE(D12, RGMII1TXD1, RGMII1);
PIN_DECL_(D12, SIG_EXPR_LIST_PTR(D12, GPIOT3),
SIG_EXPR_LIST_PTR(D12, RMII1TXD1),
SIG_EXPR_LIST_PTR(D12, RGMII1TXD1));
FUNC_GROUP_DECL(RMII1, A12, B12, C12, D12, E12, A13, E11, D11, C11, B11, A11,
FUNC_GROUP_DECL(RGMII1, A12, B12, C12, D12, E12, A13, E11, D11, C11, B11, A11,
ASPEED_PINCTRL_PIN(D12),
ASPEED_PINCTRL_PIN(D12),
SIG_EXPR_LIST_DECL_SESG(D12, SCL6, I2C6, SIG_DESC_SET(SCU418, 18));
PIN_DECL_1(D12, GPIOK2, SCL6);
FUNC_GROUP_DECL(I2C6, D12, E13);
PIC32_PINCTRL_GROUP(60, D12,
PINMUX_IPSR_GPSR(IP2_27_24, D12),
PIN_NOGP_CFG(D12, "D12", fn, SH_PFC_PIN_CFG_PULL_UP), \
PINMUX_IPSR_GPSR(IP1_14_12, D12),
PINMUX_IPSR_GPSR(IP0_12, D12),
PINMUX_SINGLE(D12),
PINMUX_IPSR_GPSR(IP1_14_13, D12),
#define IP6_31_28 FM(D12) FM(LCDOUT4) FM(MSIOF2_SS1_D) FM(RX4_C) FM(VI4_DATA4_A) F_(0, 0) FM(DU_DR4) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define GPSR0_12 F_(D12, IP6_31_28)
PINMUX_IPSR_GPSR(IP6_31_28, D12),
PINMUX_IPSR_GPSR(IP6_31_28, D12),
#define IP6_31_28 FM(D12) FM(LCDOUT4) FM(MSIOF2_SS1_D) FM(RX4_C) FM(VI4_DATA4_A) F_(0, 0) FM(DU_DR4) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define GPSR0_12 F_(D12, IP6_31_28)
PINMUX_IPSR_GPSR(IP6_31_28, D12),
#define IP6_31_28 FM(D12) FM(LCDOUT4) FM(MSIOF2_SS1_D) FM(RX4_C) FM(VI4_DATA4_A) F_(0, 0) FM(DU_DR4) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define GPSR0_12 F_(D12, IP6_31_28)
#define IP6_23_20 FM(VI1_DATA9) F_(0, 0) FM(RTS4_N) FM(D12) FM(MMC_D6) FM(SCL3_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
PINMUX_IPSR_GPSR(IP6_23_20, D12),
#define IP6_23_20 FM(VI1_DATA9) FM(TCLK1_A) F_(0, 0) FM(D12) FM(MMC_D4) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
PINMUX_IPSR_GPSR(IP6_23_20, D12),
#define IP7_7_4 FM(D12) FM(CANFD0_TX) FM(TX4_B) FM(CAN0_TX) FM(VI5_DATA8_A) F_(0, 0) F_(0, 0) FM(VI5_DATA3_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
#define GPSR0_12 F_(D12, IP7_7_4)
PINMUX_IPSR_GPSR(IP7_7_4, D12),
PINMUX_IPSR_MSEL(IP1SR2_15_12, D12, SEL_I2C4_0),
#define IP1SR2_15_12 FM(GP2_11) FM(TCLK3) FM(MSIOF5_TXD) F_(0, 0) F_(0, 0) FM(D12) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
GPIO_FN(D12),
GPIO_FN(D12),
GPIO_FN(D12),
GPIO_FN(D12), GPIO_FN(FWE_A), GPIO_FN(ET0_ETXD5_B),
PINMUX_IPSR_GPSR(IP2_24_23, D12),
GPIO_FN(D12),