arch/mips/include/asm/cacheops.h

102

#define Index_Store_Data_I (Cache_I | 0x1c)

arch/mips/include/asm/cacheops.h

109

#define Hit_Invalidate_I_Loongson2 (Cache_I | 0x00)

arch/mips/include/asm/cacheops.h

37

#define Index_Invalidate_I (Cache_I | Index_Writeback_Inv)

arch/mips/include/asm/cacheops.h

39

#define Index_Load_Tag_I (Cache_I | Index_Load_Tag)

arch/mips/include/asm/cacheops.h

41

#define Index_Store_Tag_I (Cache_I | Index_Store_Tag)

arch/mips/include/asm/cacheops.h

43

#define Hit_Invalidate_I (Cache_I | Hit_Invalidate)

arch/mips/include/asm/cacheops.h

51

#define Fill_I (Cache_I | 0x14)

arch/mips/include/asm/cacheops.h

52

#define Hit_Writeback_I (Cache_I | Hit_Writeback)

arch/mips/include/asm/cacheops.h

99

#define Index_Load_Data_I (Cache_I | 0x18)

arch/mips/kvm/vz.c

1108

if (cache != Cache_I && cache != Cache_D)