wave5_fio_writel
wave5_fio_writel(vpu_dev, W5_BACKBONE_PROC_EXT_ADDR, 0);
wave5_fio_writel(vpu_dev, W5_BACKBONE_AXI_PARAM, 0);
wave5_fio_writel(vpu_dev, W5_BACKBONE_PROG_AXI_ID, reg_val);
wave5_fio_writel(vpu_dev, W5_BACKBONE_PROC_EXT_ADDR, 0);
wave5_fio_writel(vpu_dev, W5_BACKBONE_AXI_PARAM, 0);
wave5_fio_writel(vpu_dev, W5_BACKBONE_PROG_AXI_ID, reg_val);
wave5_fio_writel(vpu_dev, W5_BACKBONE_BUS_CTRL_VCPU, 0xFF);
wave5_fio_writel(vpu_dev, W5_BACKBONE_BUS_CTRL_VCPU, 0x00);
wave5_fio_writel(vpu_dev, W5_BACKBONE_BUS_CTRL_VCORE0, 0x7);
wave5_fio_writel(vpu_dev, W5_BACKBONE_BUS_CTRL_VCORE0, 0x00);
wave5_fio_writel(vpu_dev, W5_COMBINED_BACKBONE_BUS_CTRL, 0x7);
wave5_fio_writel(vpu_dev, W5_COMBINED_BACKBONE_BUS_CTRL, 0x00);
wave5_fio_writel(vpu_dev, W5_GDI_BUS_CTRL, 0x100);
wave5_fio_writel(vpu_dev, W5_GDI_BUS_CTRL, 0x00);
wave5_fio_writel(vpu_dev, W5_BACKBONE_BUS_CTRL_VCPU, 0x00);
wave5_fio_writel(vpu_dev, W5_BACKBONE_BUS_CTRL_VCORE0, 0x00);
wave5_fio_writel(vpu_dev, W5_COMBINED_BACKBONE_BUS_CTRL, 0x00);
wave5_fio_writel(vpu_dev, W5_GDI_BUS_CTRL, 0x00);
wave5_fio_writel(vpu_dev, W5_BACKBONE_PROC_EXT_ADDR, 0);
wave5_fio_writel(vpu_dev, W5_BACKBONE_AXI_PARAM, 0);
wave5_fio_writel(vpu_dev, W5_BACKBONE_PROG_AXI_ID, reg_val);