drivers/net/ethernet/xilinx/xilinx_emaclite.c

1144

xemaclite_writel(0, lp->base_addr + XEL_TSR_OFFSET);

drivers/net/ethernet/xilinx/xilinx_emaclite.c

1145

xemaclite_writel(0, lp->base_addr + XEL_BUFFER_OFFSET + XEL_TSR_OFFSET);

drivers/net/ethernet/xilinx/xilinx_emaclite.c

157

xemaclite_writel(reg_data | XEL_TSR_XMIT_IE_MASK,

drivers/net/ethernet/xilinx/xilinx_emaclite.c

161

xemaclite_writel(XEL_RSR_RECV_IE_MASK, drvdata->base_addr + XEL_RSR_OFFSET);

drivers/net/ethernet/xilinx/xilinx_emaclite.c

164

xemaclite_writel(XEL_GIER_GIE_MASK, drvdata->base_addr + XEL_GIER_OFFSET);

drivers/net/ethernet/xilinx/xilinx_emaclite.c

179

xemaclite_writel(XEL_GIER_GIE_MASK, drvdata->base_addr + XEL_GIER_OFFSET);

drivers/net/ethernet/xilinx/xilinx_emaclite.c

183

xemaclite_writel(reg_data & (~XEL_TSR_XMIT_IE_MASK),

drivers/net/ethernet/xilinx/xilinx_emaclite.c

188

xemaclite_writel(reg_data & (~XEL_RSR_RECV_IE_MASK),

drivers/net/ethernet/xilinx/xilinx_emaclite.c

347

xemaclite_writel((byte_count & XEL_TPLR_LENGTH_MASK),

drivers/net/ethernet/xilinx/xilinx_emaclite.c

357

xemaclite_writel(reg_data, addr + XEL_TSR_OFFSET);

drivers/net/ethernet/xilinx/xilinx_emaclite.c

450

xemaclite_writel(reg_data, addr + XEL_RSR_OFFSET);

drivers/net/ethernet/xilinx/xilinx_emaclite.c

477

xemaclite_writel(ETH_ALEN, addr + XEL_TPLR_OFFSET);

drivers/net/ethernet/xilinx/xilinx_emaclite.c

481

xemaclite_writel(reg_data | XEL_TSR_PROG_MAC_ADDR, addr + XEL_TSR_OFFSET);

drivers/net/ethernet/xilinx/xilinx_emaclite.c

659

xemaclite_writel(tx_status, base_addr + XEL_TSR_OFFSET);

drivers/net/ethernet/xilinx/xilinx_emaclite.c

669

xemaclite_writel(tx_status, base_addr + XEL_BUFFER_OFFSET +

drivers/net/ethernet/xilinx/xilinx_emaclite.c

735

xemaclite_writel(XEL_MDIOADDR_OP_MASK |

drivers/net/ethernet/xilinx/xilinx_emaclite.c

738

xemaclite_writel(ctrl_reg | XEL_MDIOCTRL_MDIOSTS_MASK,

drivers/net/ethernet/xilinx/xilinx_emaclite.c

784

xemaclite_writel(~XEL_MDIOADDR_OP_MASK &

drivers/net/ethernet/xilinx/xilinx_emaclite.c

787

xemaclite_writel(val, lp->base_addr + XEL_MDIOWR_OFFSET);

drivers/net/ethernet/xilinx/xilinx_emaclite.c

788

xemaclite_writel(ctrl_reg | XEL_MDIOCTRL_MDIOSTS_MASK,

drivers/net/ethernet/xilinx/xilinx_emaclite.c

844

xemaclite_writel(XEL_MDIOCTRL_MDIOEN_MASK,