drivers/net/ethernet/xilinx/xilinx_emaclite.c

156

reg_data = xemaclite_readl(drvdata->base_addr + XEL_TSR_OFFSET);

drivers/net/ethernet/xilinx/xilinx_emaclite.c

182

reg_data = xemaclite_readl(drvdata->base_addr + XEL_TSR_OFFSET);

drivers/net/ethernet/xilinx/xilinx_emaclite.c

187

reg_data = xemaclite_readl(drvdata->base_addr + XEL_RSR_OFFSET);

drivers/net/ethernet/xilinx/xilinx_emaclite.c

322

reg_data = xemaclite_readl(addr + XEL_TSR_OFFSET);

drivers/net/ethernet/xilinx/xilinx_emaclite.c

335

reg_data = xemaclite_readl(addr + XEL_TSR_OFFSET);

drivers/net/ethernet/xilinx/xilinx_emaclite.c

355

reg_data = xemaclite_readl(addr + XEL_TSR_OFFSET);

drivers/net/ethernet/xilinx/xilinx_emaclite.c

383

reg_data = xemaclite_readl(addr + XEL_RSR_OFFSET);

drivers/net/ethernet/xilinx/xilinx_emaclite.c

402

reg_data = xemaclite_readl(addr + XEL_RSR_OFFSET);

drivers/net/ethernet/xilinx/xilinx_emaclite.c

410

proto_type = ((ntohl(xemaclite_readl(addr + XEL_HEADER_OFFSET +

drivers/net/ethernet/xilinx/xilinx_emaclite.c

419

length = ((ntohl(xemaclite_readl(addr +

drivers/net/ethernet/xilinx/xilinx_emaclite.c

448

reg_data = xemaclite_readl(addr + XEL_RSR_OFFSET);

drivers/net/ethernet/xilinx/xilinx_emaclite.c

480

reg_data = xemaclite_readl(addr + XEL_TSR_OFFSET);

drivers/net/ethernet/xilinx/xilinx_emaclite.c

484

while ((xemaclite_readl(addr + XEL_TSR_OFFSET) &

drivers/net/ethernet/xilinx/xilinx_emaclite.c

647

if ((xemaclite_readl(base_addr + XEL_RSR_OFFSET) &

drivers/net/ethernet/xilinx/xilinx_emaclite.c

649

(xemaclite_readl(base_addr + XEL_BUFFER_OFFSET + XEL_RSR_OFFSET)

drivers/net/ethernet/xilinx/xilinx_emaclite.c

655

tx_status = xemaclite_readl(base_addr + XEL_TSR_OFFSET);

drivers/net/ethernet/xilinx/xilinx_emaclite.c

665

tx_status = xemaclite_readl(base_addr + XEL_BUFFER_OFFSET + XEL_TSR_OFFSET);

drivers/net/ethernet/xilinx/xilinx_emaclite.c

703

return readx_poll_timeout(xemaclite_readl,

drivers/net/ethernet/xilinx/xilinx_emaclite.c

734

ctrl_reg = xemaclite_readl(lp->base_addr + XEL_MDIOCTRL_OFFSET);

drivers/net/ethernet/xilinx/xilinx_emaclite.c

744

rc = xemaclite_readl(lp->base_addr + XEL_MDIORD_OFFSET);

drivers/net/ethernet/xilinx/xilinx_emaclite.c

783

ctrl_reg = xemaclite_readl(lp->base_addr + XEL_MDIOCTRL_OFFSET);