drivers/gpu/drm/xe/regs/xe_reg_defs.h

128

#define XE_REG_MCR(r_, ...) ((const struct xe_reg_mcr){ \

drivers/gpu/drm/xe/xe_gt.c

309

struct xe_reg_mcr reg = { .__reg.raw = entry->reg.raw };

drivers/gpu/drm/xe/xe_gt_mcr.c

48

static inline struct xe_reg to_xe_reg(struct xe_reg_mcr reg_mcr)

drivers/gpu/drm/xe/xe_gt_mcr.c

629

struct xe_reg_mcr reg_mcr,

drivers/gpu/drm/xe/xe_gt_mcr.c

710

static u32 rw_with_mcr_steering(struct xe_gt *gt, struct xe_reg_mcr reg_mcr,

drivers/gpu/drm/xe/xe_gt_mcr.c

778

u32 xe_gt_mcr_unicast_read_any(struct xe_gt *gt, struct xe_reg_mcr reg_mcr)

drivers/gpu/drm/xe/xe_gt_mcr.c

813

struct xe_reg_mcr reg_mcr,

drivers/gpu/drm/xe/xe_gt_mcr.c

838

void xe_gt_mcr_unicast_write(struct xe_gt *gt, struct xe_reg_mcr reg_mcr,

drivers/gpu/drm/xe/xe_gt_mcr.c

856

void xe_gt_mcr_multicast_write(struct xe_gt *gt, struct xe_reg_mcr reg_mcr,

drivers/gpu/drm/xe/xe_gt_mcr.h

20

u32 xe_gt_mcr_unicast_read(struct xe_gt *gt, struct xe_reg_mcr mcr_reg,

drivers/gpu/drm/xe/xe_gt_mcr.h

22

u32 xe_gt_mcr_unicast_read_any(struct xe_gt *gt, struct xe_reg_mcr mcr_reg);

drivers/gpu/drm/xe/xe_gt_mcr.h

24

void xe_gt_mcr_unicast_write(struct xe_gt *gt, struct xe_reg_mcr mcr_reg,

drivers/gpu/drm/xe/xe_gt_mcr.h

26

void xe_gt_mcr_multicast_write(struct xe_gt *gt, struct xe_reg_mcr mcr_reg,

drivers/gpu/drm/xe/xe_gt_mcr.h

30

struct xe_reg_mcr reg_mcr,

drivers/gpu/drm/xe/xe_guc_ads.c

715

struct xe_reg_mcr mcr_reg = XE_REG_MCR(reg.addr);

drivers/gpu/drm/xe/xe_guc_capture.c

362

struct xe_reg_mcr reg;

drivers/gpu/drm/xe/xe_pat.c

297

struct xe_reg_mcr reg_mcr = XE_REG_MCR(_PAT_INDEX(i));

drivers/gpu/drm/xe/xe_reg_sr.c

123

static struct xe_reg_mcr to_xe_reg_mcr(const struct xe_reg reg)

drivers/gpu/drm/xe/xe_reg_sr.c

125

return (const struct xe_reg_mcr){.__reg.raw = reg.raw };

drivers/gpu/drm/xe/xe_reg_sr.c

131

struct xe_reg_mcr reg_mcr = to_xe_reg_mcr(reg);