Symbol: xe_pcode_read
drivers/gpu/drm/xe/xe_device_sysfs.c
125
ret = xe_pcode_read(root, PCODE_MBOX(PCODE_LATE_BINDING, GET_CAPABILITY_STATUS, 0),
drivers/gpu/drm/xe/xe_device_sysfs.c
131
ret = xe_pcode_read(root, PCODE_MBOX(PCODE_LATE_BINDING, GET_VERSION_LOW, 0),
drivers/gpu/drm/xe/xe_device_sysfs.c
136
ret = xe_pcode_read(root, PCODE_MBOX(PCODE_LATE_BINDING, GET_VERSION_HIGH, 0),
drivers/gpu/drm/xe/xe_device_sysfs.c
166
ret = xe_pcode_read(root, PCODE_MBOX(PCODE_LATE_BINDING, GET_CAPABILITY_STATUS, 0),
drivers/gpu/drm/xe/xe_device_sysfs.c
249
ret = xe_pcode_read(xe_device_get_root_tile(xe),
drivers/gpu/drm/xe/xe_device_sysfs.c
88
ret = xe_pcode_read(root, PCODE_MBOX(PCODE_LATE_BINDING, GET_CAPABILITY_STATUS, 0),
drivers/gpu/drm/xe/xe_device_sysfs.c
94
ret = xe_pcode_read(root, PCODE_MBOX(PCODE_LATE_BINDING, GET_VERSION_LOW, 0),
drivers/gpu/drm/xe/xe_device_sysfs.c
99
ret = xe_pcode_read(root, PCODE_MBOX(PCODE_LATE_BINDING, GET_VERSION_HIGH, 0),
drivers/gpu/drm/xe/xe_hwmon.c
190
ret = xe_pcode_read(root_tile, PCODE_MBOX(PCODE_POWER_SETUP,
drivers/gpu/drm/xe/xe_hwmon.c
225
ret = xe_pcode_read(root_tile, PCODE_MBOX(PCODE_POWER_SETUP,
drivers/gpu/drm/xe/xe_hwmon.c
761
ret = xe_pcode_read(root_tile, PCODE_MBOX(PCODE_THERMAL_INFO, READ_THERMAL_LIMITS, 0),
drivers/gpu/drm/xe/xe_hwmon.c
769
ret = xe_pcode_read(root_tile, PCODE_MBOX(PCODE_THERMAL_INFO, READ_THERMAL_CONFIG, 0),
drivers/gpu/drm/xe/xe_hwmon.c
788
ret = xe_pcode_read(root_tile, PCODE_MBOX(PCODE_THERMAL_INFO, READ_THERMAL_DATA, i),
drivers/gpu/drm/xe/xe_hwmon.c
809
ret = xe_pcode_read(root_tile, PCODE_MBOX(PCODE_THERMAL_INFO, READ_THERMAL_DATA,
drivers/gpu/drm/xe/xe_hwmon.c
833
return xe_pcode_read(root_tile, PCODE_MBOX(PCODE_POWER_SETUP,
drivers/gpu/drm/xe/xe_hwmon.c
857
return xe_pcode_read(root_tile, PCODE_MBOX(FAN_SPEED_CONTROL, subcmd, 0), uval, NULL);
drivers/gpu/drm/xe/xe_late_bind_fw.c
192
return xe_pcode_read(root_tile,
drivers/gpu/drm/xe/xe_pcode.c
360
return xe_pcode_read(tile, mbox, val, val1);
drivers/gpu/drm/xe/xe_pcode.h
20
int xe_pcode_read(struct xe_tile *tile, u32 mbox, u32 *val, u32 *val1);
drivers/gpu/drm/xe/xe_vram_freq.c
43
err = xe_pcode_read(tile, mbox, &val, NULL);
drivers/gpu/drm/xe/xe_vram_freq.c
65
err = xe_pcode_read(tile, mbox, &val, NULL);