drivers/gpu/drm/xe/xe_guc_engine_activity.c

216

gpm_ts = xe_mmio_read64_2x32(&gt->mmio, MISC_STATUS_0) >>

drivers/gpu/drm/xe/xe_guc_log.c

217

snapshot->stamp = xe_mmio_read64_2x32(&gt->mmio, GUC_PMTIMESTAMP_LO);

drivers/gpu/drm/xe/xe_hw_engine.c

1065

return xe_mmio_read64_2x32(&hwe->gt->mmio, RING_TIMESTAMP(hwe->mmio_base));

drivers/gpu/drm/xe/xe_hwmon.c

361

pkg_pwr = xe_mmio_read64_2x32(mmio, pkg_power_sku);

drivers/gpu/drm/xe/xe_lrc.c

2400

val = xe_mmio_read64_2x32(&hwe->gt->mmio,

drivers/gpu/drm/xe/xe_mmio.h

27

u64 xe_mmio_read64_2x32(struct xe_mmio *mmio, struct xe_reg reg);

drivers/gpu/drm/xe/xe_ttm_stolen_mgr.c

171

u64 gscpsmi_base = xe_mmio_read64_2x32(&media_gt->mmio, GSCPSMI_BASE)

drivers/gpu/drm/xe/xe_ttm_stolen_mgr.c

65

val = xe_mmio_read64_2x32(xe_root_tile_mmio(xe), STOLEN_RESERVED);

drivers/gpu/drm/xe/xe_ttm_stolen_mgr.c

97

mgr->stolen_base = (xe_mmio_read64_2x32(mmio, DSMBASE) & BDSM_MASK) - tile_offset;

drivers/gpu/drm/xe/xe_vram.c

167

offset = xe_mmio_read64_2x32(&tile->mmio, GSMBASE);

drivers/gpu/drm/xe/xe_vram.c

94

xe_assert_msg(xe, offset == (xe_mmio_read64_2x32(&gt_to_tile(gt)->mmio, GSMBASE) -