drivers/gpu/drm/xe/compat-i915-headers/intel_uncore.h

18

static inline struct xe_mmio *__compat_uncore_to_mmio(struct intel_uncore *uncore)

drivers/gpu/drm/xe/xe_debugfs.c

132

struct xe_mmio *mmio;

drivers/gpu/drm/xe/xe_debugfs.c

160

struct xe_mmio *mmio;

drivers/gpu/drm/xe/xe_debugfs.c

42

static void read_residency_counter(struct xe_device *xe, struct xe_mmio *mmio,

drivers/gpu/drm/xe/xe_device.c

564

struct xe_mmio *mmio = xe_root_tile_mmio(xe);

drivers/gpu/drm/xe/xe_device_types.h

179

struct xe_mmio mmio;

drivers/gpu/drm/xe/xe_execlist.c

47

struct xe_mmio *mmio = &gt->mmio;

drivers/gpu/drm/xe/xe_gsc.c

612

struct xe_mmio *mmio = &gt->mmio;

drivers/gpu/drm/xe/xe_gt_idle.c

105

struct xe_mmio *mmio = &gt->mmio;

drivers/gpu/drm/xe/xe_gt_mcr.c

286

struct xe_mmio *mmio = &gt->mmio;

drivers/gpu/drm/xe/xe_gt_mcr.c

714

struct xe_mmio *mmio = &gt->mmio;

drivers/gpu/drm/xe/xe_gt_sriov_pf.c

166

struct xe_mmio mmio;

drivers/gpu/drm/xe/xe_gt_sriov_pf_migration.c

377

struct xe_mmio mmio;

drivers/gpu/drm/xe/xe_gt_sriov_pf_migration.c

400

struct xe_mmio mmio;

drivers/gpu/drm/xe/xe_gt_topology.c

145

struct xe_mmio *mmio = &gt->mmio;

drivers/gpu/drm/xe/xe_gt_types.h

167

struct xe_mmio mmio;

drivers/gpu/drm/xe/xe_guc.c

1015

struct xe_mmio *mmio = &gt->mmio;

drivers/gpu/drm/xe/xe_guc.c

1418

struct xe_mmio *mmio = &gt->mmio;

drivers/gpu/drm/xe/xe_guc.c

906

struct xe_mmio *mmio = &gt->mmio;

drivers/gpu/drm/xe/xe_guc.c

941

struct xe_mmio *mmio = &gt->mmio;

drivers/gpu/drm/xe/xe_guc_tlb_inval.c

77

struct xe_mmio *mmio = &gt->mmio;

drivers/gpu/drm/xe/xe_hw_error.c

69

struct xe_mmio *mmio = &tile->mmio;

drivers/gpu/drm/xe/xe_hwmon.c

1073

struct xe_mmio *mmio = xe_root_tile_mmio(hwmon->xe);

drivers/gpu/drm/xe/xe_hwmon.c

1289

struct xe_mmio *mmio = xe_root_tile_mmio(hwmon->xe);

drivers/gpu/drm/xe/xe_hwmon.c

1462

struct xe_mmio *mmio = xe_root_tile_mmio(hwmon->xe);

drivers/gpu/drm/xe/xe_hwmon.c

334

struct xe_mmio *mmio = xe_root_tile_mmio(xe);

drivers/gpu/drm/xe/xe_hwmon.c

375

struct xe_mmio *mmio = xe_root_tile_mmio(hwmon->xe);

drivers/gpu/drm/xe/xe_hwmon.c

451

struct xe_mmio *mmio = xe_root_tile_mmio(hwmon->xe);

drivers/gpu/drm/xe/xe_hwmon.c

495

struct xe_mmio *mmio = xe_root_tile_mmio(hwmon->xe);

drivers/gpu/drm/xe/xe_hwmon.c

539

struct xe_mmio *mmio = xe_root_tile_mmio(hwmon->xe);

drivers/gpu/drm/xe/xe_hwmon.c

592

struct xe_mmio *mmio = xe_root_tile_mmio(hwmon->xe);

drivers/gpu/drm/xe/xe_hwmon.c

697

struct xe_mmio *mmio = xe_root_tile_mmio(hwmon->xe);

drivers/gpu/drm/xe/xe_hwmon.c

910

struct xe_mmio *mmio = xe_root_tile_mmio(hwmon->xe);

drivers/gpu/drm/xe/xe_hwmon.c

920

struct xe_mmio *mmio = xe_root_tile_mmio(hwmon->xe);

drivers/gpu/drm/xe/xe_hwmon.c

997

struct xe_mmio *mmio = xe_root_tile_mmio(hwmon->xe);

drivers/gpu/drm/xe/xe_i2c.c

188

struct xe_mmio *mmio = xe_root_tile_mmio(xe);

drivers/gpu/drm/xe/xe_i2c.c

198

struct xe_mmio *mmio = xe_root_tile_mmio(xe);

drivers/gpu/drm/xe/xe_i2c.c

273

struct xe_mmio *mmio = xe_root_tile_mmio(xe);

drivers/gpu/drm/xe/xe_i2c.c

284

struct xe_mmio *mmio = xe_root_tile_mmio(xe);

drivers/gpu/drm/xe/xe_i2c.c

56

static inline void xe_i2c_read_endpoint(struct xe_mmio *mmio, void *ep)

drivers/gpu/drm/xe/xe_i2c.h

17

struct xe_mmio;

drivers/gpu/drm/xe/xe_i2c.h

47

struct xe_mmio *mmio;

drivers/gpu/drm/xe/xe_irq.c

115

struct xe_mmio *mmio = xe_root_tile_mmio(xe);

drivers/gpu/drm/xe/xe_irq.c

130

struct xe_mmio *mmio = xe_root_tile_mmio(xe);

drivers/gpu/drm/xe/xe_irq.c

141

struct xe_mmio *mmio = &gt->mmio;

drivers/gpu/drm/xe/xe_irq.c

273

struct xe_mmio *mmio,

drivers/gpu/drm/xe/xe_irq.c

357

struct xe_mmio *mmio = &tile->mmio;

drivers/gpu/drm/xe/xe_irq.c

42

static void assert_iir_is_zero(struct xe_mmio *mmio, struct xe_reg reg)

drivers/gpu/drm/xe/xe_irq.c

444

struct xe_mmio *mmio = xe_root_tile_mmio(xe);

drivers/gpu/drm/xe/xe_irq.c

462

struct xe_mmio *mmio = xe_root_tile_mmio(xe);

drivers/gpu/drm/xe/xe_irq.c

495

struct xe_mmio *mmio = &tile->mmio;

drivers/gpu/drm/xe/xe_irq.c

541

struct xe_mmio *mmio = &tile->mmio;

drivers/gpu/drm/xe/xe_irq.c

620

struct xe_mmio *mmio = &tile->mmio;

drivers/gpu/drm/xe/xe_irq.c

64

struct xe_mmio *mmio = &tile->mmio;

drivers/gpu/drm/xe/xe_irq.c

82

struct xe_mmio *mmio = &tile->mmio;

drivers/gpu/drm/xe/xe_irq.c

99

struct xe_mmio *mmio = xe_root_tile_mmio(xe);

drivers/gpu/drm/xe/xe_mmio.c

122

void xe_mmio_init(struct xe_mmio *mmio, struct xe_tile *tile, void __iomem *ptr, u32 size)

drivers/gpu/drm/xe/xe_mmio.c

131

static void mmio_flush_pending_writes(struct xe_mmio *mmio)

drivers/gpu/drm/xe/xe_mmio.c

144

u8 xe_mmio_read8(struct xe_mmio *mmio, struct xe_reg reg)

drivers/gpu/drm/xe/xe_mmio.c

157

u16 xe_mmio_read16(struct xe_mmio *mmio, struct xe_reg reg)

drivers/gpu/drm/xe/xe_mmio.c

170

void xe_mmio_write32(struct xe_mmio *mmio, struct xe_reg reg, u32 val)

drivers/gpu/drm/xe/xe_mmio.c

183

u32 xe_mmio_read32(struct xe_mmio *mmio, struct xe_reg reg)

drivers/gpu/drm/xe/xe_mmio.c

201

u32 xe_mmio_rmw32(struct xe_mmio *mmio, struct xe_reg reg, u32 clr, u32 set)

drivers/gpu/drm/xe/xe_mmio.c

212

int xe_mmio_write32_and_verify(struct xe_mmio *mmio,

drivers/gpu/drm/xe/xe_mmio.c

223

bool xe_mmio_in_range(const struct xe_mmio *mmio,

drivers/gpu/drm/xe/xe_mmio.c

254

u64 xe_mmio_read64_2x32(struct xe_mmio *mmio, struct xe_reg reg)

drivers/gpu/drm/xe/xe_mmio.c

282

static int __xe_mmio_wait32(struct xe_mmio *mmio, struct xe_reg reg, u32 mask, u32 val,

drivers/gpu/drm/xe/xe_mmio.c

354

int xe_mmio_wait32(struct xe_mmio *mmio, struct xe_reg reg, u32 mask, u32 val, u32 timeout_us,

drivers/gpu/drm/xe/xe_mmio.c

373

int xe_mmio_wait32_not(struct xe_mmio *mmio, struct xe_reg reg, u32 mask, u32 val, u32 timeout_us,

drivers/gpu/drm/xe/xe_mmio.c

391

void xe_mmio_init_vf_view(struct xe_mmio *mmio, const struct xe_mmio *base, unsigned int vfid)

drivers/gpu/drm/xe/xe_mmio.h

17

void xe_mmio_init(struct xe_mmio *mmio, struct xe_tile *tile, void __iomem *ptr, u32 size);

drivers/gpu/drm/xe/xe_mmio.h

19

u8 xe_mmio_read8(struct xe_mmio *mmio, struct xe_reg reg);

drivers/gpu/drm/xe/xe_mmio.h

20

u16 xe_mmio_read16(struct xe_mmio *mmio, struct xe_reg reg);

drivers/gpu/drm/xe/xe_mmio.h

21

void xe_mmio_write32(struct xe_mmio *mmio, struct xe_reg reg, u32 val);

drivers/gpu/drm/xe/xe_mmio.h

22

u32 xe_mmio_read32(struct xe_mmio *mmio, struct xe_reg reg);

drivers/gpu/drm/xe/xe_mmio.h

23

u32 xe_mmio_rmw32(struct xe_mmio *mmio, struct xe_reg reg, u32 clr, u32 set);

drivers/gpu/drm/xe/xe_mmio.h

24

int xe_mmio_write32_and_verify(struct xe_mmio *mmio, struct xe_reg reg, u32 val, u32 mask, u32 eval);

drivers/gpu/drm/xe/xe_mmio.h

25

bool xe_mmio_in_range(const struct xe_mmio *mmio, const struct xe_mmio_range *range, struct xe_reg reg);

drivers/gpu/drm/xe/xe_mmio.h

27

u64 xe_mmio_read64_2x32(struct xe_mmio *mmio, struct xe_reg reg);

drivers/gpu/drm/xe/xe_mmio.h

28

int xe_mmio_wait32(struct xe_mmio *mmio, struct xe_reg reg, u32 mask, u32 val,

drivers/gpu/drm/xe/xe_mmio.h

30

int xe_mmio_wait32_not(struct xe_mmio *mmio, struct xe_reg reg, u32 mask,

drivers/gpu/drm/xe/xe_mmio.h

33

static inline u32 xe_mmio_adjusted_addr(const struct xe_mmio *mmio, u32 addr)

drivers/gpu/drm/xe/xe_mmio.h

40

static inline struct xe_mmio *xe_root_tile_mmio(struct xe_device *xe)

drivers/gpu/drm/xe/xe_mmio.h

46

void xe_mmio_init_vf_view(struct xe_mmio *mmio, const struct xe_mmio *base, unsigned int vfid);

drivers/gpu/drm/xe/xe_nvm.c

46

struct xe_mmio *mmio = xe_root_tile_mmio(xe);

drivers/gpu/drm/xe/xe_nvm.c

60

struct xe_mmio *mmio = xe_root_tile_mmio(xe);

drivers/gpu/drm/xe/xe_oa.c

1075

struct xe_mmio *mmio = &stream->gt->mmio;

drivers/gpu/drm/xe/xe_oa.c

409

struct xe_mmio *mmio = &stream->gt->mmio;

drivers/gpu/drm/xe/xe_oa.c

493

struct xe_mmio *mmio = &stream->gt->mmio;

drivers/gpu/drm/xe/xe_oa.c

821

struct xe_mmio *mmio = &stream->gt->mmio;

drivers/gpu/drm/xe/xe_pci.c

536

struct xe_mmio *mmio = xe_root_tile_mmio(xe);

drivers/gpu/drm/xe/xe_pci.c

735

struct xe_mmio *mmio;

drivers/gpu/drm/xe/xe_pcode.c

74

struct xe_mmio *mmio = &tile->mmio;

drivers/gpu/drm/xe/xe_query.c

96

struct xe_mmio *mmio = &hwe->gt->mmio;

drivers/gpu/drm/xe/xe_survivability_mode.c

130

static void set_survivability_info(struct xe_mmio *mmio, u32 *info, int id)

drivers/gpu/drm/xe/xe_survivability_mode.c

139

struct xe_mmio *mmio;

drivers/gpu/drm/xe/xe_survivability_mode.c

372

struct xe_mmio *mmio = xe_root_tile_mmio(xe);

drivers/gpu/drm/xe/xe_trace.h

376

TP_PROTO(struct xe_mmio *mmio, bool write, u32 reg, u64 val, int len),

drivers/gpu/drm/xe/xe_ttm_stolen_mgr.c

87

struct xe_mmio *mmio = xe_root_tile_mmio(xe);

drivers/gpu/drm/xe/xe_uc_fw.c

858

struct xe_mmio *mmio = &gt->mmio;

drivers/gpu/drm/xe/xe_wa.c

1099

struct xe_mmio *mmio = &tile->mmio;