xe_device_get_root_tile
obj = xe_bo_create_pin_map_novm(xe, xe_device_get_root_tile(xe),
obj = xe_bo_create_pin_map_novm(xe, xe_device_get_root_tile(xe), size,
XE_BO_FLAG_VRAM_IF_DGFX(xe_device_get_root_tile(xe)) |
obj = xe_bo_create_pin_map_novm(xe, xe_device_get_root_tile(xe),
XE_BO_FLAG_VRAM_IF_DGFX(xe_device_get_root_tile(xe)) |
struct xe_tile *tile0 = xe_device_get_root_tile(xe);
struct xe_ggtt *ggtt = xe_device_get_root_tile(xe)->mem.ggtt;
struct xe_vram_region *vram = xe_device_get_root_tile(xe)->mem.vram;
u8 tile_id = xe_device_get_root_tile(xe_bo_device(vma->bo))->id;
struct xe_ggtt *ggtt = xe_device_get_root_tile(xe)->mem.ggtt;
struct xe_tile *tile0 = xe_device_get_root_tile(xe);
struct xe_tile *tile = xe_device_get_root_tile(xe);
bo = xe_bo_create_pin_map_novm(xe, xe_device_get_root_tile(xe), PAGE_SIZE * 2,
struct xe_tile *tile0 = xe_device_get_root_tile(xe);
bo = xe_bo_create_pin_range_novm(xe, xe_device_get_root_tile(xe),
struct xe_vm *vm = xe_migrate_get_vm(xe_device_get_root_tile(xe)->migrate);
ggtt = xe_device_get_root_tile(test->priv)->mem.ggtt;
bo = xe_managed_bo_create_pin_map(xe, xe_device_get_root_tile(xe), g2g_size,
struct xe_gt *gt = xe_device_get_root_tile(xe)->primary_gt;
struct xe_gt *gt = xe_device_get_root_tile(xe)->primary_gt;
tile = xe_device_get_root_tile(xe);
XE_BO_FLAG_VRAM_IF_DGFX(xe_device_get_root_tile(xe)) |
return xe_device_get_root_tile(xe)->primary_gt;
struct xe_tile *root = xe_device_get_root_tile(xe);
struct xe_tile *root = xe_device_get_root_tile(xe);
ret = xe_pcode_read(xe_device_get_root_tile(xe),
struct xe_tile *root = xe_device_get_root_tile(xe);
struct xe_tile *tile = xe_device_get_root_tile(xe);
struct xe_tile *root_tile = xe_device_get_root_tile(hwmon->xe);
struct xe_tile *root_tile = xe_device_get_root_tile(hwmon->xe);
struct xe_tile *root_tile = xe_device_get_root_tile(hwmon->xe);
struct xe_tile *root_tile = xe_device_get_root_tile(hwmon->xe);
struct xe_tile *root_tile = xe_device_get_root_tile(hwmon->xe);
struct xe_tile *root_tile = xe_device_get_root_tile(hwmon->xe);
struct xe_tile *root_tile = xe_device_get_root_tile(hwmon->xe);
struct xe_tile *root_tile = xe_device_get_root_tile(hwmon->xe);
struct xe_tile *tile = xe_device_get_root_tile(xe);
tile = xe_device_get_root_tile(xe);
unmask_and_enable(xe_device_get_root_tile(xe),
struct xe_tile *root_tile = xe_device_get_root_tile(xe);
struct xe_tile *tile = xe_device_get_root_tile(xe);
struct xe_tile *tile = xe_device_get_root_tile(xe);
struct xe_tile *tile = xe_device_get_root_tile(xe);
struct xe_tile *tile = xe_device_get_root_tile(xe);
struct xe_tile *root_tile = xe_device_get_root_tile(xe);
struct xe_tile *root_tile = xe_device_get_root_tile(xe);
err = xe_tile_init_early(xe_device_get_root_tile(xe), xe, 0);
struct xe_tile *tile = xe_device_get_root_tile(xe);
struct xe_tile *tile = xe_device_get_root_tile(xe);
struct xe_tile *tile = xe_device_get_root_tile(xe);
struct xe_tile *tile = xe_device_get_root_tile(xe);
int shift = xe_device_get_root_tile(xe)->media_gt ? 1 : 0;
struct xe_tile *tile = xe_device_get_root_tile(xe);
tile = xe_device_get_root_tile(xe);
struct xe_gt *media_gt = xe_device_get_root_tile(xe)->media_gt;
struct xe_vram_region *tile_vram = xe_device_get_root_tile(xe)->mem.vram;
xe_device_get_root_tile(vm->xe));