arch/x86/hyperv/hv_apic.c

131

ipi_arg->vp_set.valid_bank_mask = 0;

arch/x86/hyperv/hv_apic.c

138

ipi_arg->vp_set.format = HV_GENERIC_SET_SPARSE_4K;

arch/x86/hyperv/hv_apic.c

140

nr_bank = cpumask_to_vpset_skip(&ipi_arg->vp_set, mask,

arch/x86/hyperv/hv_apic.c

151

ipi_arg->vp_set.format = HV_GENERIC_SET_ALL;

arch/x86/hyperv/irqdomain.c

44

intr_desc->target.vp_set.valid_bank_mask = 0;

arch/x86/hyperv/irqdomain.c

45

intr_desc->target.vp_set.format = HV_GENERIC_SET_SPARSE_4K;

arch/x86/hyperv/irqdomain.c

46

nr_bank = cpumask_to_vpset(&intr_desc->target.vp_set, cpumask_of(cpu));

arch/x86/kvm/hyperv.c

2269

send_ipi_ex.vp_set.format = hc->outgpa;

arch/x86/kvm/hyperv.c

2270

send_ipi_ex.vp_set.valid_bank_mask = sse128_lo(hc->xmm[0]);

arch/x86/kvm/hyperv.c

2274

send_ipi_ex.vp_set.format,

arch/x86/kvm/hyperv.c

2275

send_ipi_ex.vp_set.valid_bank_mask);

arch/x86/kvm/hyperv.c

2278

valid_bank_mask = send_ipi_ex.vp_set.valid_bank_mask;

arch/x86/kvm/hyperv.c

2279

all_cpus = send_ipi_ex.vp_set.format == HV_GENERIC_SET_ALL;

arch/x86/kvm/hyperv.c

2292

vp_set.bank_contents);

drivers/pci/controller/pci-hyperv.c

668

nr_bank = cpumask_to_vpset(&params->int_target.vp_set, tmp);

drivers/virtio/virtio_pci_legacy.c

191

.set = vp_set,

drivers/virtio/virtio_pci_modern.c

1249

.set = vp_set,

include/hyperv/hvgdk_mini.h

1462

struct hv_vpset vp_set;

include/hyperv/hvhdk_mini.h

468

struct hv_vpset vp_set;

tools/testing/selftests/kvm/x86/hyperv_ipi.c

121

ipi_ex->vp_set.format = HV_GENERIC_SET_SPARSE_4K;

tools/testing/selftests/kvm/x86/hyperv_ipi.c

122

ipi_ex->vp_set.valid_bank_mask = 1 << 0;

tools/testing/selftests/kvm/x86/hyperv_ipi.c

123

ipi_ex->vp_set.bank_contents[0] = BIT(RECEIVER_VCPU_ID_1);

tools/testing/selftests/kvm/x86/hyperv_ipi.c

131

hyperv_write_xmm_input(&ipi_ex->vp_set.valid_bank_mask, 1);

tools/testing/selftests/kvm/x86/hyperv_ipi.c

143

ipi_ex->vp_set.format = HV_GENERIC_SET_SPARSE_4K;

tools/testing/selftests/kvm/x86/hyperv_ipi.c

144

ipi_ex->vp_set.valid_bank_mask = 1 << 1;

tools/testing/selftests/kvm/x86/hyperv_ipi.c

145

ipi_ex->vp_set.bank_contents[0] = BIT(RECEIVER_VCPU_ID_2 - 64);

tools/testing/selftests/kvm/x86/hyperv_ipi.c

153

hyperv_write_xmm_input(&ipi_ex->vp_set.valid_bank_mask, 1);

tools/testing/selftests/kvm/x86/hyperv_ipi.c

165

ipi_ex->vp_set.format = HV_GENERIC_SET_SPARSE_4K;

tools/testing/selftests/kvm/x86/hyperv_ipi.c

166

ipi_ex->vp_set.valid_bank_mask = 1 << 1 | 1;

tools/testing/selftests/kvm/x86/hyperv_ipi.c

167

ipi_ex->vp_set.bank_contents[0] = BIT(RECEIVER_VCPU_ID_1);

tools/testing/selftests/kvm/x86/hyperv_ipi.c

168

ipi_ex->vp_set.bank_contents[1] = BIT(RECEIVER_VCPU_ID_2 - 64);

tools/testing/selftests/kvm/x86/hyperv_ipi.c

176

hyperv_write_xmm_input(&ipi_ex->vp_set.valid_bank_mask, 2);

tools/testing/selftests/kvm/x86/hyperv_ipi.c

188

ipi_ex->vp_set.format = HV_GENERIC_SET_ALL;

tools/testing/selftests/kvm/x86/hyperv_ipi.c

197

ipi_ex->vp_set.valid_bank_mask = 0;

tools/testing/selftests/kvm/x86/hyperv_ipi.c

198

hyperv_write_xmm_input(&ipi_ex->vp_set.valid_bank_mask, 2);

tools/testing/selftests/kvm/x86/hyperv_ipi.c

45

struct hv_vpset vp_set;