wss_inb
while (wss_inb(chip, CS4231P(REGSEL)) & CS4231_INIT) {
wss_inb(chip, CS4231P(STATUS));
if (wss_inb(chip, CS4231P(REGSEL)) & CS4231_INIT)
wss_inb(chip, CS4231P(STATUS)); /* clear any pendings IRQ */
timeout = wss_inb(chip, CS4231P(REGSEL));
timeout > 0 && (wss_inb(chip, CS4231P(REGSEL)) & CS4231_INIT);
timeout > 0 && (wss_inb(chip, CS4231P(REGSEL)) & CS4231_INIT);
if (wss_inb(chip, CS4231P(REGSEL)) & CS4231_INIT)
if (wss_inb(chip, CS4231P(REGSEL)) & CS4231_INIT)
return wss_inb(chip, CS4231P(REG));
return wss_inb(chip, CS4231P(REG));
res = wss_inb(chip, CS4231P(REG));
wss_inb(chip, CS4231P(REGSEL)),
wss_inb(chip, CS4231P(STATUS)));
wss_inb(chip, CS4231P(REGSEL));
timeout > 0 && (wss_inb(chip, CS4231P(REGSEL)) & CS4231_INIT);
if (wss_inb(chip, CS4231P(REGSEL)) & CS4231_INIT)
timeout = wss_inb(chip, CS4231P(REGSEL));
if (wss_inb(chip, CS4231P(REGSEL)) & CS4231_INIT)
timeout = wss_inb(chip, CS4231P(REGSEL));
while (wss_inb(chip, CS4231P(REGSEL)) & CS4231_INIT) {
wss_inb(chip, CS4231P(REGSEL)));