Symbol: writel_bits_relaxed
drivers/gpu/drm/meson/meson_crtc.c
142
writel_bits_relaxed(VPP_POSTBLEND_ENABLE, VPP_POSTBLEND_ENABLE,
drivers/gpu/drm/meson/meson_crtc.c
190
writel_bits_relaxed(VPP_OSD1_POSTBLEND | VPP_VD1_POSTBLEND |
drivers/gpu/drm/meson/meson_crtc.c
245
writel_bits_relaxed(VPP_OSD1_POSTBLEND, VPP_OSD1_POSTBLEND,
drivers/gpu/drm/meson/meson_crtc.c
254
writel_bits_relaxed(OSD_MEM_LINEAR_ADDR, OSD_MEM_LINEAR_ADDR,
drivers/gpu/drm/meson/meson_crtc.c
262
writel_bits_relaxed(OSD_MEM_LINEAR_ADDR, OSD_MEM_LINEAR_ADDR,
drivers/gpu/drm/meson/meson_crtc.c
265
writel_bits_relaxed(OSD_MALI_SRC_EN, OSD_MALI_SRC_EN,
drivers/gpu/drm/meson/meson_crtc.c
283
writel_bits_relaxed(3 << 8, 3 << 8,
drivers/gpu/drm/meson/meson_crtc.c
289
writel_bits_relaxed(VPP_VD1_PREBLEND | VPP_VD1_POSTBLEND |
drivers/gpu/drm/meson/meson_crtc.c
295
writel_bits_relaxed(VIU_CTRL0_AFBC_TO_VD1,
drivers/gpu/drm/meson/meson_dw_hdmi.c
417
writel_bits_relaxed(0x3, 0,
drivers/gpu/drm/meson/meson_dw_hdmi.c
419
writel_bits_relaxed(0xf << 8, 0,
drivers/gpu/drm/meson/meson_dw_hdmi.c
429
writel_bits_relaxed(0xf << 8, wr_clk & (0xf << 8),
drivers/gpu/drm/meson/meson_dw_hdmi.c
434
writel_bits_relaxed(0x3, MESON_VENC_SOURCE_ENCI,
drivers/gpu/drm/meson/meson_dw_hdmi.c
437
writel_bits_relaxed(0x3, MESON_VENC_SOURCE_ENCP,
drivers/gpu/drm/meson/meson_dw_hdmi.c
615
writel_bits_relaxed(BIT(15), BIT(15),
drivers/gpu/drm/meson/meson_dw_hdmi.c
617
writel_bits_relaxed(BIT(15), BIT(15),
drivers/gpu/drm/meson/meson_dw_mipi_dsi.c
57
writel_bits_relaxed(MIPI_DSI_TOP_SW_RESET_DWC | MIPI_DSI_TOP_SW_RESET_INTR |
drivers/gpu/drm/meson/meson_dw_mipi_dsi.c
62
writel_bits_relaxed(MIPI_DSI_TOP_SW_RESET_DWC | MIPI_DSI_TOP_SW_RESET_INTR |
drivers/gpu/drm/meson/meson_dw_mipi_dsi.c
67
writel_bits_relaxed(MIPI_DSI_TOP_CLK_SYSCLK_EN | MIPI_DSI_TOP_CLK_PIXCLK_EN,
drivers/gpu/drm/meson/meson_encoder_cvbs.c
176
writel_bits_relaxed(VENC_VDAC_SEL_ATV_DMD, 0,
drivers/gpu/drm/meson/meson_encoder_dsi.c
72
writel_bits_relaxed(ENCL_VIDEO_MODE_ADV_VFIFO_EN, ENCL_VIDEO_MODE_ADV_VFIFO_EN,
drivers/gpu/drm/meson/meson_encoder_dsi.c
76
writel_bits_relaxed(BIT(0), 0, priv->io_base + _REG(VPP_WRAP_OSD1_MATRIX_EN_CTRL));
drivers/gpu/drm/meson/meson_encoder_dsi.c
90
writel_bits_relaxed(BIT(0), BIT(0), priv->io_base + _REG(VPP_WRAP_OSD1_MATRIX_EN_CTRL));
drivers/gpu/drm/meson/meson_encoder_hdmi.c
260
writel_bits_relaxed(0x3, 0,
drivers/gpu/drm/meson/meson_osd_afbcd.c
112
writel_bits_relaxed(OSD1_AFBCD_DEC_ENABLE, 0,
drivers/gpu/drm/meson/meson_osd_afbcd.c
301
writel_bits_relaxed(MALI_AFBCD_MANUAL_RESET, MALI_AFBCD_MANUAL_RESET,
drivers/gpu/drm/meson/meson_osd_afbcd.c
335
writel_bits_relaxed(VPU_MAFBC_S0_ENABLE, 0,
drivers/gpu/drm/meson/meson_overlay.c
743
writel_bits_relaxed(VPP_VD1_POSTBLEND | VPP_VD1_PREBLEND, 0,
drivers/gpu/drm/meson/meson_plane.c
413
writel_bits_relaxed(VIU_OSD1_POSTBLD_SRC_OSD1, 0,
drivers/gpu/drm/meson/meson_plane.c
416
writel_bits_relaxed(VPP_OSD1_POSTBLEND, 0,
drivers/gpu/drm/meson/meson_rdma.c
129
writel_bits_relaxed(RDMA_ACCESS_TRIGGER_CHAN1,
drivers/gpu/drm/meson/meson_rdma.c
65
writel_bits_relaxed(RDMA_ACCESS_RW_FLAG_CHAN1 |
drivers/gpu/drm/meson/meson_rdma.c
73
writel_bits_relaxed(RDMA_IRQ_CLEAR_CHAN1,
drivers/gpu/drm/meson/meson_rdma.c
78
writel_bits_relaxed(RDMA_ACCESS_TRIGGER_CHAN1,
drivers/gpu/drm/meson/meson_venc.c
1045
writel_bits_relaxed(0xff, 0xff,
drivers/gpu/drm/meson/meson_venc.c
1400
writel_bits_relaxed(ENCP_VIDEO_MODE_DE_V_HIGH,
drivers/gpu/drm/meson/meson_venc.c
1587
writel_bits_relaxed(L_GAMMA_CNTL_PORT_EN, 0,
drivers/gpu/drm/meson/meson_venc.c
1625
writel_bits_relaxed(L_GAMMA_CNTL_PORT_EN, L_GAMMA_CNTL_PORT_EN,
drivers/gpu/drm/meson/meson_venc.c
1691
writel_bits_relaxed(ENCL_VIDEO_MODE_ADV_VFIFO_EN, 0,
drivers/gpu/drm/meson/meson_venc.c
1987
writel_bits_relaxed(VPU_HDMI_ENCI_DATA_TO_HDMI |
drivers/gpu/drm/meson/meson_viu.c
105
writel_bits_relaxed(BIT(0), csc_on ? BIT(0) : 0,
drivers/gpu/drm/meson/meson_viu.c
149
writel_bits_relaxed(3 << 30, m[21] << 30,
drivers/gpu/drm/meson/meson_viu.c
151
writel_bits_relaxed(7 << 16, m[22] << 16,
drivers/gpu/drm/meson/meson_viu.c
155
writel_bits_relaxed(BIT(0), csc_on ? BIT(0) : 0,
drivers/gpu/drm/meson/meson_viu.c
157
writel_bits_relaxed(BIT(1), 0,
drivers/gpu/drm/meson/meson_viu.c
168
writel_bits_relaxed(BIT(30), csc_on ? BIT(30) : 0,
drivers/gpu/drm/meson/meson_viu.c
170
writel_bits_relaxed(BIT(31), csc_on ? BIT(31) : 0,
drivers/gpu/drm/meson/meson_viu.c
221
writel_bits_relaxed(0x7 << 29, 7 << 29,
drivers/gpu/drm/meson/meson_viu.c
224
writel_bits_relaxed(0x7 << 29, 0,
drivers/gpu/drm/meson/meson_viu.c
248
writel_bits_relaxed(7 << 27, 7 << 27,
drivers/gpu/drm/meson/meson_viu.c
251
writel_bits_relaxed(7 << 27, 0,
drivers/gpu/drm/meson/meson_viu.c
254
writel_bits_relaxed(BIT(31), BIT(31),
drivers/gpu/drm/meson/meson_viu.c
326
writel_bits_relaxed(VIU_SW_RESET_OSD1, VIU_SW_RESET_OSD1,
drivers/gpu/drm/meson/meson_viu.c
328
writel_bits_relaxed(VIU_SW_RESET_OSD1, 0,
drivers/gpu/drm/meson/meson_viu.c
366
writel_bits_relaxed(VIU_OSD1_MALI_UNPACK_EN,
drivers/gpu/drm/meson/meson_viu.c
378
writel_bits_relaxed(VIU_OSD1_MALI_AFBCD_A_REORDER |
drivers/gpu/drm/meson/meson_viu.c
386
writel_bits_relaxed(OSD_PATH_OSD_AXI_SEL_OSD1_AFBCD,
drivers/gpu/drm/meson/meson_viu.c
394
writel_bits_relaxed(OSD_PATH_OSD_AXI_SEL_OSD1_AFBCD, 0,
drivers/gpu/drm/meson/meson_viu.c
398
writel_bits_relaxed(VIU_OSD1_MALI_UNPACK_EN, 0,
drivers/gpu/drm/meson/meson_viu.c
404
writel_bits_relaxed(MALI_AFBC_MISC, FIELD_PREP(MALI_AFBC_MISC, 0x90),
drivers/gpu/drm/meson/meson_viu.c
410
writel_bits_relaxed(MALI_AFBC_MISC, FIELD_PREP(MALI_AFBC_MISC, 0x00),
drivers/gpu/drm/meson/meson_viu.c
419
writel_bits_relaxed(VIU_OSD1_OSD_BLK_ENABLE | VIU_OSD1_OSD_ENABLE, 0,
drivers/gpu/drm/meson/meson_viu.c
421
writel_bits_relaxed(VIU_OSD1_OSD_BLK_ENABLE | VIU_OSD1_OSD_ENABLE, 0,
drivers/gpu/drm/meson/meson_viu.c
432
writel_bits_relaxed(OSD1_HDR2_CTRL_REG_ONLY_MAT |
drivers/gpu/drm/meson/meson_viu.c
452
writel_bits_relaxed(0xff << OSD_REPLACE_SHIFT,
drivers/gpu/drm/meson/meson_viu.c
455
writel_bits_relaxed(0xff << OSD_REPLACE_SHIFT,
drivers/gpu/drm/meson/meson_viu.c
461
writel_bits_relaxed(VIU_CTRL0_VD1_AFBC_MASK, 0,
drivers/gpu/drm/meson/meson_viu.c
494
writel_bits_relaxed(DOLBY_BYPASS_EN(0xc), DOLBY_BYPASS_EN(0xc),
drivers/gpu/drm/meson/meson_vpp.c
113
writel_bits_relaxed(VPP_OFIFO_SIZE_MASK, 0x77f,
drivers/gpu/drm/meson/meson_vpp.c
120
writel_bits_relaxed(VPP_PREBLEND_ENABLE, 0,
drivers/gpu/drm/meson/meson_vpp.c
124
writel_bits_relaxed(VPP_POSTBLEND_ENABLE, 0,
drivers/gpu/drm/meson/meson_vpp.c
128
writel_bits_relaxed(VPP_OSD1_POSTBLEND | VPP_OSD2_POSTBLEND |
drivers/gpu/drm/meson/meson_vpp.c
97
writel_bits_relaxed(0xff << 16, 0xff << 16,
drivers/media/cec/platform/meson/ao-cec.c
309
writel_bits_relaxed(cfg, enable ? cfg : 0,
drivers/media/cec/platform/meson/ao-cec.c
550
writel_bits_relaxed(CEC_GEN_CNTL_RESET, CEC_GEN_CNTL_RESET,
drivers/media/cec/platform/meson/ao-cec.c
557
writel_bits_relaxed(CEC_GEN_CNTL_CLK_CTRL_MASK,
drivers/media/cec/platform/meson/ao-cec.c
565
writel_bits_relaxed(CEC_GEN_CNTL_RESET, 0,
drivers/spi/spi-meson-spicc.c
321
writel_bits_relaxed(SPICC_BURSTLENGTH_MASK, SPICC_BURSTLENGTH_MASK,
drivers/spi/spi-meson-spicc.c
365
writel_bits_relaxed(SPICC_SMC, 0, spicc->base + SPICC_CONREG);
drivers/spi/spi-meson-spicc.c
451
writel_bits_relaxed(SPICC_BURSTLENGTH_MASK,
drivers/spi/spi-meson-spicc.c
464
writel_bits_relaxed(SPICC_TC, SPICC_TC, spicc->base + SPICC_STATREG);
drivers/spi/spi-meson-spicc.c
485
writel_bits_relaxed(SPICC_XCH, SPICC_XCH, spicc->base + SPICC_CONREG);
drivers/spi/spi-meson-spicc.c
560
writel_bits_relaxed(SPICC_ENH_MAIN_CLK_AO,
drivers/spi/spi-meson-spicc.c
564
writel_bits_relaxed(SPICC_FIFORST_W1_MASK, SPICC_FIFORST_W1_MASK,
drivers/spi/spi-meson-spicc.c
571
writel_bits_relaxed(SPICC_ENH_MAIN_CLK_AO, 0,
drivers/spi/spi-meson-spicc.c
633
writel_bits_relaxed(SPICC_SMC, SPICC_SMC, spicc->base + SPICC_CONREG);
drivers/spi/spi-meson-spicc.c
640
writel_bits_relaxed(SPICC_XCH, SPICC_XCH, spicc->base + SPICC_CONREG);
drivers/spi/spi-meson-spicc.c
712
writel_bits_relaxed(SPICC_LBC_W1,