write_sbdchn
write_sbdchn(sport, R_DUART_MODE_REG_2, mode2);
write_sbdchn(sport, R_DUART_CMD, M_DUART_TX_DIS);
write_sbdchn(sport, R_DUART_CMD, M_DUART_TX_EN);
write_sbdchn(sport, R_DUART_AUXCTL_X,
write_sbdchn(sport, R_DUART_CMD, V_DUART_MISC_CMD_START_BREAK);
write_sbdchn(sport, R_DUART_CMD, V_DUART_MISC_CMD_STOP_BREAK);
write_sbdchn(sport, R_DUART_TX_HOLD, sport->port.x_char);
write_sbdchn(sport, R_DUART_TX_HOLD, ch);
write_sbdchn(sport, R_DUART_CMD, V_DUART_MISC_CMD_RESET_BREAK_INT);
write_sbdchn(sport, R_DUART_MODE_REG_1, mode1);
write_sbdchn(sport, R_DUART_CMD, M_DUART_TX_DIS | M_DUART_RX_EN);
write_sbdchn(sport, R_DUART_CMD, M_DUART_TX_DIS | M_DUART_RX_DIS);
write_sbdchn(sport, R_DUART_CMD, V_DUART_MISC_CMD_RESET_TX);
write_sbdchn(sport, R_DUART_CMD, V_DUART_MISC_CMD_RESET_RX);
write_sbdchn(sport, R_DUART_MODE_REG_1, V_DUART_BITS_PER_CHAR_8);
write_sbdchn(sport, R_DUART_MODE_REG_2, 0);
write_sbdchn(sport, R_DUART_FULL_CTL,
write_sbdchn(sport, R_DUART_OPCR_X, 0);
write_sbdchn(sport, R_DUART_AUXCTL_X, 0);
write_sbdchn(sport, R_DUART_CMD, M_DUART_TX_DIS | M_DUART_RX_DIS);
write_sbdchn(sport, R_DUART_MODE_REG_1, mode1 | oldmode1);
write_sbdchn(sport, R_DUART_MODE_REG_2, mode2 | oldmode2);
write_sbdchn(sport, R_DUART_CLK_SEL, brg);
write_sbdchn(sport, R_DUART_AUXCTL_X, aux | oldaux);
write_sbdchn(sport, R_DUART_CMD, command);
write_sbdchn(sport, R_DUART_TX_HOLD, ch);
write_sbdchn(sport, R_DUART_CMD, M_DUART_TX_EN);
write_sbdchn(sport, R_DUART_CMD, M_DUART_TX_DIS);