write_dma_reg
write_dma_reg(PAS_DMA_RXINT_RCMDSTA(mac->dma_if),
write_dma_reg(PAS_DMA_RXCHAN_INCR(rx_ring(mac)->chan.chno),
write_dma_reg(PAS_DMA_TXCHAN_TCMDSTA(txch),
write_dma_reg(PAS_DMA_TXCHAN_TCMDSTA(txch), 0);
write_dma_reg(PAS_DMA_RXCHAN_CCMDSTA(rxch),
write_dma_reg(PAS_DMA_RXCHAN_CCMDSTA(rxch), 0);
write_dma_reg(PAS_DMA_RXINT_RCMDSTA(mac->dma_if),
write_dma_reg(PAS_DMA_RXINT_RCMDSTA(mac->dma_if), 0);
write_dma_reg(PAS_DMA_TXCHAN_INCR(csring->chan.chno), (cs_size) >> 1);
write_dma_reg(PAS_DMA_TXCHAN_INCR(txring->chan.chno), 2);
write_dma_reg(PAS_DMA_TXCHAN_INCR(txring->chan.chno), (nfrags+2) >> 1);
write_dma_reg(PAS_DMA_RXINT_RCMDSTA(mac->dma_if),
write_dma_reg(PAS_DMA_TXCHAN_BASEL(chno),
write_dma_reg(PAS_DMA_TXCHAN_BASEU(chno), val);
write_dma_reg(PAS_DMA_TXCHAN_CFG(chno), cfg);
write_dma_reg(PAS_DMA_RXCHAN_BASEL(chno),
write_dma_reg(PAS_DMA_RXCHAN_BASEU(chno),
write_dma_reg(PAS_DMA_RXCHAN_CFG(chno), cfg);
write_dma_reg(PAS_DMA_RXINT_BASEL(mac->dma_if),
write_dma_reg(PAS_DMA_RXINT_BASEU(mac->dma_if),
write_dma_reg(PAS_DMA_RXINT_CFG(mac->dma_if), cfg);
write_dma_reg(PAS_DMA_TXCHAN_BASEL(chno),
write_dma_reg(PAS_DMA_TXCHAN_BASEU(chno), val);
write_dma_reg(PAS_DMA_TXCHAN_CFG(chno), cfg);
write_dma_reg(PAS_DMA_RXINT_INCR(mac->dma_if), count);
write_dma_reg(PAS_DMA_RXCHAN_INCR(mac->rx->chan.chno), count << 1);