Symbol: wiz
drivers/phy/ti/phy-j721e-wiz.c
1014
static void wiz_clock_cleanup(struct wiz *wiz, struct device_node *node)
drivers/phy/ti/phy-j721e-wiz.c
1016
const struct wiz_clk_mux_sel *clk_mux_sel = wiz->clk_mux_sel;
drivers/phy/ti/phy-j721e-wiz.c
1017
struct device *dev = wiz->dev;
drivers/phy/ti/phy-j721e-wiz.c
1021
switch (wiz->type) {
drivers/phy/ti/phy-j721e-wiz.c
1038
for (i = 0; i < wiz->clk_div_sel_num; i++) {
drivers/phy/ti/phy-j721e-wiz.c
1044
of_clk_del_provider(wiz->dev->of_node);
drivers/phy/ti/phy-j721e-wiz.c
1047
static int wiz_clock_register(struct wiz *wiz)
drivers/phy/ti/phy-j721e-wiz.c
1049
const struct wiz_clk_mux_sel *clk_mux_sel = wiz->clk_mux_sel;
drivers/phy/ti/phy-j721e-wiz.c
1050
struct device *dev = wiz->dev;
drivers/phy/ti/phy-j721e-wiz.c
1058
ret = wiz_mux_clk_register(wiz, wiz->mux_sel_field[i], &clk_mux_sel[i], clk_index);
drivers/phy/ti/phy-j721e-wiz.c
1065
ret = wiz_phy_en_refclk_register(wiz);
drivers/phy/ti/phy-j721e-wiz.c
1071
wiz->clk_data.clks = wiz->output_clks;
drivers/phy/ti/phy-j721e-wiz.c
1072
wiz->clk_data.clk_num = WIZ_MAX_OUTPUT_CLOCKS;
drivers/phy/ti/phy-j721e-wiz.c
1073
ret = of_clk_add_provider(node, of_clk_src_onecell_get, &wiz->clk_data);
drivers/phy/ti/phy-j721e-wiz.c
1080
static void wiz_clock_init(struct wiz *wiz)
drivers/phy/ti/phy-j721e-wiz.c
1084
rate = clk_get_rate(wiz->input_clks[WIZ_CORE_REFCLK]);
drivers/phy/ti/phy-j721e-wiz.c
1086
regmap_field_write(wiz->pma_cmn_refclk_int_mode, 0x1);
drivers/phy/ti/phy-j721e-wiz.c
1088
regmap_field_write(wiz->pma_cmn_refclk_int_mode, 0x3);
drivers/phy/ti/phy-j721e-wiz.c
1090
switch (wiz->type) {
drivers/phy/ti/phy-j721e-wiz.c
1095
regmap_field_write(wiz->div_sel_field[CMN_REFCLK_DIG_DIV], 0x2);
drivers/phy/ti/phy-j721e-wiz.c
1098
regmap_field_write(wiz->div_sel_field[CMN_REFCLK_DIG_DIV], 0x3);
drivers/phy/ti/phy-j721e-wiz.c
1101
regmap_field_write(wiz->div_sel_field[CMN_REFCLK_DIG_DIV], 0);
drivers/phy/ti/phy-j721e-wiz.c
1109
if (wiz->input_clks[WIZ_CORE_REFCLK1]) {
drivers/phy/ti/phy-j721e-wiz.c
1110
rate = clk_get_rate(wiz->input_clks[WIZ_CORE_REFCLK1]);
drivers/phy/ti/phy-j721e-wiz.c
1112
regmap_field_write(wiz->pma_cmn_refclk1_int_mode, 0x1);
drivers/phy/ti/phy-j721e-wiz.c
1114
regmap_field_write(wiz->pma_cmn_refclk1_int_mode, 0x3);
drivers/phy/ti/phy-j721e-wiz.c
1117
rate = clk_get_rate(wiz->input_clks[WIZ_EXT_REFCLK]);
drivers/phy/ti/phy-j721e-wiz.c
1119
regmap_field_write(wiz->pma_cmn_refclk_mode, 0x0);
drivers/phy/ti/phy-j721e-wiz.c
1121
regmap_field_write(wiz->pma_cmn_refclk_mode, 0x2);
drivers/phy/ti/phy-j721e-wiz.c
1124
static int wiz_clock_probe(struct wiz *wiz, struct device_node *node)
drivers/phy/ti/phy-j721e-wiz.c
1126
const struct wiz_clk_mux_sel *clk_mux_sel = wiz->clk_mux_sel;
drivers/phy/ti/phy-j721e-wiz.c
1127
struct device *dev = wiz->dev;
drivers/phy/ti/phy-j721e-wiz.c
1139
wiz->input_clks[WIZ_CORE_REFCLK] = clk;
drivers/phy/ti/phy-j721e-wiz.c
1141
if (wiz->data->pma_cmn_refclk1_int_mode) {
drivers/phy/ti/phy-j721e-wiz.c
1147
wiz->input_clks[WIZ_CORE_REFCLK1] = clk;
drivers/phy/ti/phy-j721e-wiz.c
1155
wiz->input_clks[WIZ_EXT_REFCLK] = clk;
drivers/phy/ti/phy-j721e-wiz.c
1157
wiz_clock_init(wiz);
drivers/phy/ti/phy-j721e-wiz.c
1159
switch (wiz->type) {
drivers/phy/ti/phy-j721e-wiz.c
1164
ret = wiz_clock_register(wiz);
drivers/phy/ti/phy-j721e-wiz.c
1181
ret = wiz_mux_of_clk_register(wiz, clk_node, wiz->mux_sel_field[i],
drivers/phy/ti/phy-j721e-wiz.c
1192
for (i = 0; i < wiz->clk_div_sel_num; i++) {
drivers/phy/ti/phy-j721e-wiz.c
1200
ret = wiz_div_clk_register(wiz, clk_node, wiz->div_sel_field[i],
drivers/phy/ti/phy-j721e-wiz.c
1212
wiz_clock_cleanup(wiz, node);
drivers/phy/ti/phy-j721e-wiz.c
1221
struct wiz *wiz = dev_get_drvdata(dev);
drivers/phy/ti/phy-j721e-wiz.c
1225
ret = regmap_field_write(wiz->phy_reset_n, false);
drivers/phy/ti/phy-j721e-wiz.c
1229
ret = regmap_field_write(wiz->p_enable[id - 1], P_ENABLE_DISABLE);
drivers/phy/ti/phy-j721e-wiz.c
1233
static int wiz_phy_fullrt_div(struct wiz *wiz, int lane)
drivers/phy/ti/phy-j721e-wiz.c
1235
switch (wiz->type) {
drivers/phy/ti/phy-j721e-wiz.c
1237
if (wiz->lane_phy_type[lane] == PHY_TYPE_PCIE)
drivers/phy/ti/phy-j721e-wiz.c
1238
return regmap_field_write(wiz->p0_fullrt_div[lane], 0x1);
drivers/phy/ti/phy-j721e-wiz.c
1246
if (wiz->lane_phy_type[lane] == PHY_TYPE_SGMII)
drivers/phy/ti/phy-j721e-wiz.c
1247
return regmap_field_write(wiz->p0_fullrt_div[lane], 0x2);
drivers/phy/ti/phy-j721e-wiz.c
1259
struct wiz *wiz = dev_get_drvdata(dev);
drivers/phy/ti/phy-j721e-wiz.c
1264
if (wiz->gpio_typec_dir) {
drivers/phy/ti/phy-j721e-wiz.c
1265
if (wiz->typec_dir_delay)
drivers/phy/ti/phy-j721e-wiz.c
1266
msleep_interruptible(wiz->typec_dir_delay);
drivers/phy/ti/phy-j721e-wiz.c
1268
if (gpiod_get_value_cansleep(wiz->gpio_typec_dir))
drivers/phy/ti/phy-j721e-wiz.c
1269
regmap_field_write(wiz->typec_ln10_swap, 1);
drivers/phy/ti/phy-j721e-wiz.c
1271
regmap_field_write(wiz->typec_ln10_swap, 0);
drivers/phy/ti/phy-j721e-wiz.c
1277
u32 num_lanes = wiz->num_lanes;
drivers/phy/ti/phy-j721e-wiz.c
1281
if (wiz->lane_phy_type[i] == PHY_TYPE_USB3) {
drivers/phy/ti/phy-j721e-wiz.c
1282
switch (wiz->master_lane_num[i]) {
drivers/phy/ti/phy-j721e-wiz.c
1284
regmap_field_write(wiz->typec_ln10_swap, 1);
drivers/phy/ti/phy-j721e-wiz.c
1287
regmap_field_write(wiz->typec_ln23_swap, 1);
drivers/phy/ti/phy-j721e-wiz.c
1298
ret = regmap_field_write(wiz->phy_reset_n, true);
drivers/phy/ti/phy-j721e-wiz.c
1302
ret = wiz_phy_fullrt_div(wiz, id - 1);
drivers/phy/ti/phy-j721e-wiz.c
1306
if (wiz->lane_phy_type[id - 1] == PHY_TYPE_DP)
drivers/phy/ti/phy-j721e-wiz.c
1307
ret = regmap_field_write(wiz->p_enable[id - 1], P_ENABLE);
drivers/phy/ti/phy-j721e-wiz.c
1309
ret = regmap_field_write(wiz->p_enable[id - 1], P_ENABLE_FORCE);
drivers/phy/ti/phy-j721e-wiz.c
1405
static int wiz_get_lane_phy_types(struct device *dev, struct wiz *wiz)
drivers/phy/ti/phy-j721e-wiz.c
1438
wiz->master_lane_num[i] = reg;
drivers/phy/ti/phy-j721e-wiz.c
1439
wiz->lane_phy_type[i] = phy_type;
drivers/phy/ti/phy-j721e-wiz.c
1458
struct wiz *wiz;
drivers/phy/ti/phy-j721e-wiz.c
1463
wiz = devm_kzalloc(dev, sizeof(*wiz), GFP_KERNEL);
drivers/phy/ti/phy-j721e-wiz.c
1464
if (!wiz)
drivers/phy/ti/phy-j721e-wiz.c
1473
wiz->data = data;
drivers/phy/ti/phy-j721e-wiz.c
1474
wiz->type = data->type;
drivers/phy/ti/phy-j721e-wiz.c
1501
wiz->scm_regmap = syscon_regmap_lookup_by_phandle(node, "ti,scm");
drivers/phy/ti/phy-j721e-wiz.c
1502
if (IS_ERR(wiz->scm_regmap)) {
drivers/phy/ti/phy-j721e-wiz.c
1503
if (wiz->type == J7200_WIZ_10G) {
drivers/phy/ti/phy-j721e-wiz.c
1509
wiz->scm_regmap = NULL;
drivers/phy/ti/phy-j721e-wiz.c
1524
wiz->gpio_typec_dir = devm_gpiod_get_optional(dev, "typec-dir",
drivers/phy/ti/phy-j721e-wiz.c
1526
if (IS_ERR(wiz->gpio_typec_dir)) {
drivers/phy/ti/phy-j721e-wiz.c
1527
ret = PTR_ERR(wiz->gpio_typec_dir);
drivers/phy/ti/phy-j721e-wiz.c
1534
if (wiz->gpio_typec_dir) {
drivers/phy/ti/phy-j721e-wiz.c
1536
&wiz->typec_dir_delay);
drivers/phy/ti/phy-j721e-wiz.c
1544
wiz->typec_dir_delay = WIZ_TYPEC_DIR_DEBOUNCE_MIN;
drivers/phy/ti/phy-j721e-wiz.c
1546
if (wiz->typec_dir_delay < WIZ_TYPEC_DIR_DEBOUNCE_MIN ||
drivers/phy/ti/phy-j721e-wiz.c
1547
wiz->typec_dir_delay > WIZ_TYPEC_DIR_DEBOUNCE_MAX) {
drivers/phy/ti/phy-j721e-wiz.c
1554
ret = wiz_get_lane_phy_types(dev, wiz);
drivers/phy/ti/phy-j721e-wiz.c
1558
wiz->dev = dev;
drivers/phy/ti/phy-j721e-wiz.c
1559
wiz->regmap = regmap;
drivers/phy/ti/phy-j721e-wiz.c
1560
wiz->num_lanes = num_lanes;
drivers/phy/ti/phy-j721e-wiz.c
1561
wiz->clk_mux_sel = data->clk_mux_sel;
drivers/phy/ti/phy-j721e-wiz.c
1562
wiz->clk_div_sel = clk_div_sel;
drivers/phy/ti/phy-j721e-wiz.c
1563
wiz->clk_div_sel_num = data->clk_div_sel_num;
drivers/phy/ti/phy-j721e-wiz.c
1565
platform_set_drvdata(pdev, wiz);
drivers/phy/ti/phy-j721e-wiz.c
1567
ret = wiz_regfield_init(wiz);
drivers/phy/ti/phy-j721e-wiz.c
1574
if (wiz->scm_regmap)
drivers/phy/ti/phy-j721e-wiz.c
1575
regmap_field_write(wiz->sup_legacy_clk_override, 1);
drivers/phy/ti/phy-j721e-wiz.c
1577
phy_reset_dev = &wiz->wiz_phy_reset_dev;
drivers/phy/ti/phy-j721e-wiz.c
1598
ret = wiz_clock_probe(wiz, node);
drivers/phy/ti/phy-j721e-wiz.c
1604
for (i = 0; i < wiz->num_lanes; i++) {
drivers/phy/ti/phy-j721e-wiz.c
1605
regmap_field_read(wiz->p_enable[i], &val);
drivers/phy/ti/phy-j721e-wiz.c
1613
ret = wiz_init(wiz);
drivers/phy/ti/phy-j721e-wiz.c
1626
wiz->serdes_pdev = serdes_pdev;
drivers/phy/ti/phy-j721e-wiz.c
1632
wiz_clock_cleanup(wiz, node);
drivers/phy/ti/phy-j721e-wiz.c
1649
struct wiz *wiz;
drivers/phy/ti/phy-j721e-wiz.c
1651
wiz = dev_get_drvdata(dev);
drivers/phy/ti/phy-j721e-wiz.c
1652
serdes_pdev = wiz->serdes_pdev;
drivers/phy/ti/phy-j721e-wiz.c
1655
wiz_clock_cleanup(wiz, node);
drivers/phy/ti/phy-j721e-wiz.c
1662
struct wiz *wiz = dev_get_drvdata(dev);
drivers/phy/ti/phy-j721e-wiz.c
1666
regmap_field_read(wiz->mux_sel_field[i], &wiz->mux_sel_status[i]);
drivers/phy/ti/phy-j721e-wiz.c
1674
struct wiz *wiz = dev_get_drvdata(dev);
drivers/phy/ti/phy-j721e-wiz.c
1678
regmap_field_write(wiz->mux_sel_field[i], wiz->mux_sel_status[i]);
drivers/phy/ti/phy-j721e-wiz.c
1681
if (wiz->sup_legacy_clk_override)
drivers/phy/ti/phy-j721e-wiz.c
1682
regmap_field_write(wiz->sup_legacy_clk_override, 1);
drivers/phy/ti/phy-j721e-wiz.c
1684
wiz_clock_init(wiz);
drivers/phy/ti/phy-j721e-wiz.c
1686
ret = wiz_init(wiz);
drivers/phy/ti/phy-j721e-wiz.c
1695
wiz_clock_cleanup(wiz, node);
drivers/phy/ti/phy-j721e-wiz.c
399
static int wiz_reset(struct wiz *wiz)
drivers/phy/ti/phy-j721e-wiz.c
403
ret = regmap_field_write(wiz->por_en, 0x1);
drivers/phy/ti/phy-j721e-wiz.c
409
ret = regmap_field_write(wiz->por_en, 0x0);
drivers/phy/ti/phy-j721e-wiz.c
416
static int wiz_p_mac_div_sel(struct wiz *wiz)
drivers/phy/ti/phy-j721e-wiz.c
418
u32 num_lanes = wiz->num_lanes;
drivers/phy/ti/phy-j721e-wiz.c
423
if (wiz->lane_phy_type[i] == PHY_TYPE_SGMII ||
drivers/phy/ti/phy-j721e-wiz.c
424
wiz->lane_phy_type[i] == PHY_TYPE_QSGMII ||
drivers/phy/ti/phy-j721e-wiz.c
425
wiz->lane_phy_type[i] == PHY_TYPE_USXGMII) {
drivers/phy/ti/phy-j721e-wiz.c
426
ret = regmap_field_write(wiz->p_mac_div_sel0[i], 1);
drivers/phy/ti/phy-j721e-wiz.c
430
ret = regmap_field_write(wiz->p_mac_div_sel1[i], 2);
drivers/phy/ti/phy-j721e-wiz.c
439
static int wiz_mode_select(struct wiz *wiz)
drivers/phy/ti/phy-j721e-wiz.c
441
u32 num_lanes = wiz->num_lanes;
drivers/phy/ti/phy-j721e-wiz.c
447
if (wiz->lane_phy_type[i] == PHY_TYPE_DP) {
drivers/phy/ti/phy-j721e-wiz.c
449
} else if (wiz->lane_phy_type[i] == PHY_TYPE_QSGMII) {
drivers/phy/ti/phy-j721e-wiz.c
451
} else if (wiz->lane_phy_type[i] == PHY_TYPE_USXGMII) {
drivers/phy/ti/phy-j721e-wiz.c
452
ret = regmap_field_write(wiz->p0_mac_src_sel[i], 0x3);
drivers/phy/ti/phy-j721e-wiz.c
453
ret = regmap_field_write(wiz->p0_rxfclk_sel[i], 0x3);
drivers/phy/ti/phy-j721e-wiz.c
454
ret = regmap_field_write(wiz->p0_refclk_sel[i], 0x2);
drivers/phy/ti/phy-j721e-wiz.c
460
ret = regmap_field_write(wiz->p_standard_mode[i], mode);
drivers/phy/ti/phy-j721e-wiz.c
468
static int wiz_init_raw_interface(struct wiz *wiz, bool enable)
drivers/phy/ti/phy-j721e-wiz.c
470
u32 num_lanes = wiz->num_lanes;
drivers/phy/ti/phy-j721e-wiz.c
475
ret = regmap_field_write(wiz->p_align[i], enable);
drivers/phy/ti/phy-j721e-wiz.c
479
ret = regmap_field_write(wiz->p_raw_auto_start[i], enable);
drivers/phy/ti/phy-j721e-wiz.c
487
static int wiz_init(struct wiz *wiz)
drivers/phy/ti/phy-j721e-wiz.c
489
struct device *dev = wiz->dev;
drivers/phy/ti/phy-j721e-wiz.c
492
ret = wiz_reset(wiz);
drivers/phy/ti/phy-j721e-wiz.c
498
ret = wiz_mode_select(wiz);
drivers/phy/ti/phy-j721e-wiz.c
504
ret = wiz_p_mac_div_sel(wiz);
drivers/phy/ti/phy-j721e-wiz.c
510
ret = wiz_init_raw_interface(wiz, true);
drivers/phy/ti/phy-j721e-wiz.c
519
static int wiz_regfield_init(struct wiz *wiz)
drivers/phy/ti/phy-j721e-wiz.c
521
struct regmap *regmap = wiz->regmap;
drivers/phy/ti/phy-j721e-wiz.c
522
struct regmap *scm_regmap = wiz->regmap; /* updated later to scm_regmap if applicable */
drivers/phy/ti/phy-j721e-wiz.c
523
int num_lanes = wiz->num_lanes;
drivers/phy/ti/phy-j721e-wiz.c
524
struct device *dev = wiz->dev;
drivers/phy/ti/phy-j721e-wiz.c
525
const struct wiz_data *data = wiz->data;
drivers/phy/ti/phy-j721e-wiz.c
528
wiz->por_en = devm_regmap_field_alloc(dev, regmap, por_en);
drivers/phy/ti/phy-j721e-wiz.c
529
if (IS_ERR(wiz->por_en)) {
drivers/phy/ti/phy-j721e-wiz.c
531
return PTR_ERR(wiz->por_en);
drivers/phy/ti/phy-j721e-wiz.c
534
wiz->phy_reset_n = devm_regmap_field_alloc(dev, regmap,
drivers/phy/ti/phy-j721e-wiz.c
536
if (IS_ERR(wiz->phy_reset_n)) {
drivers/phy/ti/phy-j721e-wiz.c
538
return PTR_ERR(wiz->phy_reset_n);
drivers/phy/ti/phy-j721e-wiz.c
541
wiz->pma_cmn_refclk_int_mode =
drivers/phy/ti/phy-j721e-wiz.c
543
if (IS_ERR(wiz->pma_cmn_refclk_int_mode)) {
drivers/phy/ti/phy-j721e-wiz.c
545
return PTR_ERR(wiz->pma_cmn_refclk_int_mode);
drivers/phy/ti/phy-j721e-wiz.c
548
wiz->pma_cmn_refclk_mode =
drivers/phy/ti/phy-j721e-wiz.c
550
if (IS_ERR(wiz->pma_cmn_refclk_mode)) {
drivers/phy/ti/phy-j721e-wiz.c
552
return PTR_ERR(wiz->pma_cmn_refclk_mode);
drivers/phy/ti/phy-j721e-wiz.c
555
wiz->div_sel_field[CMN_REFCLK_DIG_DIV] =
drivers/phy/ti/phy-j721e-wiz.c
557
if (IS_ERR(wiz->div_sel_field[CMN_REFCLK_DIG_DIV])) {
drivers/phy/ti/phy-j721e-wiz.c
559
return PTR_ERR(wiz->div_sel_field[CMN_REFCLK_DIG_DIV]);
drivers/phy/ti/phy-j721e-wiz.c
563
wiz->div_sel_field[CMN_REFCLK1_DIG_DIV] =
drivers/phy/ti/phy-j721e-wiz.c
566
if (IS_ERR(wiz->div_sel_field[CMN_REFCLK1_DIG_DIV])) {
drivers/phy/ti/phy-j721e-wiz.c
568
return PTR_ERR(wiz->div_sel_field[CMN_REFCLK1_DIG_DIV]);
drivers/phy/ti/phy-j721e-wiz.c
572
if (wiz->scm_regmap) {
drivers/phy/ti/phy-j721e-wiz.c
573
scm_regmap = wiz->scm_regmap;
drivers/phy/ti/phy-j721e-wiz.c
574
wiz->sup_legacy_clk_override =
drivers/phy/ti/phy-j721e-wiz.c
576
if (IS_ERR(wiz->sup_legacy_clk_override)) {
drivers/phy/ti/phy-j721e-wiz.c
578
return PTR_ERR(wiz->sup_legacy_clk_override);
drivers/phy/ti/phy-j721e-wiz.c
582
wiz->mux_sel_field[PLL0_REFCLK] =
drivers/phy/ti/phy-j721e-wiz.c
584
if (IS_ERR(wiz->mux_sel_field[PLL0_REFCLK])) {
drivers/phy/ti/phy-j721e-wiz.c
586
return PTR_ERR(wiz->mux_sel_field[PLL0_REFCLK]);
drivers/phy/ti/phy-j721e-wiz.c
589
wiz->mux_sel_field[PLL1_REFCLK] =
drivers/phy/ti/phy-j721e-wiz.c
591
if (IS_ERR(wiz->mux_sel_field[PLL1_REFCLK])) {
drivers/phy/ti/phy-j721e-wiz.c
593
return PTR_ERR(wiz->mux_sel_field[PLL1_REFCLK]);
drivers/phy/ti/phy-j721e-wiz.c
596
wiz->mux_sel_field[REFCLK_DIG] = devm_regmap_field_alloc(dev, scm_regmap,
drivers/phy/ti/phy-j721e-wiz.c
598
if (IS_ERR(wiz->mux_sel_field[REFCLK_DIG])) {
drivers/phy/ti/phy-j721e-wiz.c
600
return PTR_ERR(wiz->mux_sel_field[REFCLK_DIG]);
drivers/phy/ti/phy-j721e-wiz.c
604
wiz->pma_cmn_refclk1_int_mode =
drivers/phy/ti/phy-j721e-wiz.c
606
if (IS_ERR(wiz->pma_cmn_refclk1_int_mode)) {
drivers/phy/ti/phy-j721e-wiz.c
608
return PTR_ERR(wiz->pma_cmn_refclk1_int_mode);
drivers/phy/ti/phy-j721e-wiz.c
613
wiz->p_enable[i] = devm_regmap_field_alloc(dev, regmap,
drivers/phy/ti/phy-j721e-wiz.c
615
if (IS_ERR(wiz->p_enable[i])) {
drivers/phy/ti/phy-j721e-wiz.c
617
return PTR_ERR(wiz->p_enable[i]);
drivers/phy/ti/phy-j721e-wiz.c
620
wiz->p_align[i] = devm_regmap_field_alloc(dev, regmap,
drivers/phy/ti/phy-j721e-wiz.c
622
if (IS_ERR(wiz->p_align[i])) {
drivers/phy/ti/phy-j721e-wiz.c
624
return PTR_ERR(wiz->p_align[i]);
drivers/phy/ti/phy-j721e-wiz.c
627
wiz->p_raw_auto_start[i] =
drivers/phy/ti/phy-j721e-wiz.c
629
if (IS_ERR(wiz->p_raw_auto_start[i])) {
drivers/phy/ti/phy-j721e-wiz.c
632
return PTR_ERR(wiz->p_raw_auto_start[i]);
drivers/phy/ti/phy-j721e-wiz.c
635
wiz->p_standard_mode[i] =
drivers/phy/ti/phy-j721e-wiz.c
637
if (IS_ERR(wiz->p_standard_mode[i])) {
drivers/phy/ti/phy-j721e-wiz.c
640
return PTR_ERR(wiz->p_standard_mode[i]);
drivers/phy/ti/phy-j721e-wiz.c
643
wiz->p0_fullrt_div[i] = devm_regmap_field_alloc(dev, regmap, p0_fullrt_div[i]);
drivers/phy/ti/phy-j721e-wiz.c
644
if (IS_ERR(wiz->p0_fullrt_div[i])) {
drivers/phy/ti/phy-j721e-wiz.c
646
return PTR_ERR(wiz->p0_fullrt_div[i]);
drivers/phy/ti/phy-j721e-wiz.c
649
wiz->p0_mac_src_sel[i] = devm_regmap_field_alloc(dev, regmap, p0_mac_src_sel[i]);
drivers/phy/ti/phy-j721e-wiz.c
650
if (IS_ERR(wiz->p0_mac_src_sel[i])) {
drivers/phy/ti/phy-j721e-wiz.c
652
return PTR_ERR(wiz->p0_mac_src_sel[i]);
drivers/phy/ti/phy-j721e-wiz.c
655
wiz->p0_rxfclk_sel[i] = devm_regmap_field_alloc(dev, regmap, p0_rxfclk_sel[i]);
drivers/phy/ti/phy-j721e-wiz.c
656
if (IS_ERR(wiz->p0_rxfclk_sel[i])) {
drivers/phy/ti/phy-j721e-wiz.c
658
return PTR_ERR(wiz->p0_rxfclk_sel[i]);
drivers/phy/ti/phy-j721e-wiz.c
661
wiz->p0_refclk_sel[i] = devm_regmap_field_alloc(dev, regmap, p0_refclk_sel[i]);
drivers/phy/ti/phy-j721e-wiz.c
662
if (IS_ERR(wiz->p0_refclk_sel[i])) {
drivers/phy/ti/phy-j721e-wiz.c
664
return PTR_ERR(wiz->p0_refclk_sel[i]);
drivers/phy/ti/phy-j721e-wiz.c
667
wiz->p_mac_div_sel0[i] =
drivers/phy/ti/phy-j721e-wiz.c
669
if (IS_ERR(wiz->p_mac_div_sel0[i])) {
drivers/phy/ti/phy-j721e-wiz.c
672
return PTR_ERR(wiz->p_mac_div_sel0[i]);
drivers/phy/ti/phy-j721e-wiz.c
675
wiz->p_mac_div_sel1[i] =
drivers/phy/ti/phy-j721e-wiz.c
677
if (IS_ERR(wiz->p_mac_div_sel1[i])) {
drivers/phy/ti/phy-j721e-wiz.c
680
return PTR_ERR(wiz->p_mac_div_sel1[i]);
drivers/phy/ti/phy-j721e-wiz.c
684
wiz->typec_ln10_swap = devm_regmap_field_alloc(dev, regmap,
drivers/phy/ti/phy-j721e-wiz.c
686
if (IS_ERR(wiz->typec_ln10_swap)) {
drivers/phy/ti/phy-j721e-wiz.c
688
return PTR_ERR(wiz->typec_ln10_swap);
drivers/phy/ti/phy-j721e-wiz.c
691
wiz->typec_ln23_swap = devm_regmap_field_alloc(dev, regmap,
drivers/phy/ti/phy-j721e-wiz.c
693
if (IS_ERR(wiz->typec_ln23_swap)) {
drivers/phy/ti/phy-j721e-wiz.c
695
return PTR_ERR(wiz->typec_ln23_swap);
drivers/phy/ti/phy-j721e-wiz.c
698
wiz->phy_en_refclk = devm_regmap_field_alloc(dev, regmap, phy_en_refclk);
drivers/phy/ti/phy-j721e-wiz.c
699
if (IS_ERR(wiz->phy_en_refclk)) {
drivers/phy/ti/phy-j721e-wiz.c
701
return PTR_ERR(wiz->phy_en_refclk);
drivers/phy/ti/phy-j721e-wiz.c
742
static int wiz_phy_en_refclk_register(struct wiz *wiz)
drivers/phy/ti/phy-j721e-wiz.c
745
struct device *dev = wiz->dev;
drivers/phy/ti/phy-j721e-wiz.c
769
wiz_phy_en_refclk->phy_en_refclk = wiz->phy_en_refclk;
drivers/phy/ti/phy-j721e-wiz.c
779
wiz->output_clks[TI_WIZ_PHY_EN_REFCLK] = clk;
drivers/phy/ti/phy-j721e-wiz.c
810
static int wiz_mux_clk_register(struct wiz *wiz, struct regmap_field *field,
drivers/phy/ti/phy-j721e-wiz.c
813
struct device *dev = wiz->dev;
drivers/phy/ti/phy-j721e-wiz.c
833
clk = wiz->input_clks[mux_sel->parents[i]];
drivers/phy/ti/phy-j721e-wiz.c
863
wiz->output_clks[clk_index] = clk;
drivers/phy/ti/phy-j721e-wiz.c
871
static int wiz_mux_of_clk_register(struct wiz *wiz, struct device_node *node,
drivers/phy/ti/phy-j721e-wiz.c
874
struct device *dev = wiz->dev;
drivers/phy/ti/phy-j721e-wiz.c
966
static int wiz_div_clk_register(struct wiz *wiz, struct device_node *node,
drivers/phy/ti/phy-j721e-wiz.c
970
struct device *dev = wiz->dev;