win0base
writeb(page, card->win0base + C101_PAGE);
writeb(1, port->win0base + C101_DTR);
writeb(0, port->win0base + C101_DTR);
readb(card->win0base + C101_PAGE); /* Resets SCA? */
if (card->win0base) {
iounmap(card->win0base);
card->win0base = ioremap(winbase, C101_MAPPED_RAM_SIZE);
if (!card->win0base) {
readb(card->win0base + C101_PAGE); /* Resets SCA? */
writeb(0, card->win0base + C101_PAGE);
writeb(0, card->win0base + C101_DTR); /* Power-up for RAM? */
u8 __iomem *win0base; /* ISA window base address */
#define sca_in(reg, card) readb((card)->win0base + C101_SCA + (reg))
#define sca_out(value, reg, card) writeb(value, (card)->win0base + C101_SCA + (reg))
#define sca_inw(reg, card) readw((card)->win0base + C101_SCA + (reg))
writeb(value & 0xFF, (card)->win0base + C101_SCA + (reg)); \
writeb((value >> 8) & 0xFF, (card)->win0base + C101_SCA + (reg + 1));\
#define win0base(card) ((card)->win0base)
#define winbase(card) ((card)->win0base + 0x2000)
return (pkt_desc __iomem *)(win0base(port_to_card(port))