ves1x93_readreg
return FEC_1_2 + ((ves1x93_readreg (state, 0x0d) >> 4) & 0x7);
u8 sync = ves1x93_readreg (state, 0x0e);
sync = ves1x93_readreg (state, 0x0e);
*ber = ves1x93_readreg (state, 0x15);
*ber |= (ves1x93_readreg (state, 0x16) << 8);
*ber |= ((ves1x93_readreg (state, 0x17) & 0x0F) << 16);
u8 signal = ~ves1x93_readreg (state, 0x0b);
u8 _snr = ~ves1x93_readreg (state, 0x1c);
*ucblocks = ves1x93_readreg (state, 0x18) & 0x7f;
afc = ((int)((char)(ves1x93_readreg (state, 0x0a) << 1)))/2;
p->inversion = (ves1x93_readreg (state, 0x0f) & 2) ?
identity = ves1x93_readreg(state, 0x1e);