wait_reset
if (!virt->ops || !virt->ops->wait_reset)
return virt->ops->wait_reset(adev);
int (*wait_reset)(struct amdgpu_device *adev);
.wait_reset = xgpu_ai_wait_reset,
.wait_reset = xgpu_nv_wait_reset,
.wait_reset = xgpu_vi_wait_reset_cmpl,
wait_reset(alg_data);
wait_reset(alg_data);
wait_reset(alg_data);
wait_reset(alg_data);
if (wait_reset(alg_data)) {
static int atmel_isi_wait_status(struct atmel_isi *isi, int wait_reset)
if (wait_reset) {
db->wait_reset = 1;
db->wait_reset = 1;
if (db->wait_reset) {
db->wait_reset = 0;
u8 wait_reset; /* Hardware failed, need to reset */
db->wait_reset = 0;
db->wait_reset = 1; /* Need to RESET */
db->wait_reset = 1;
db->wait_reset = 1;
if (db->wait_reset) {
db->wait_reset = 0;
u8 wait_reset; /* Hardware failed, need to reset */
db->wait_reset = 0;
db->wait_reset = 1; /* Need to RESET */
unsigned long wait_reset;
wait_reset = jiffies + (MAX_LOOP_TIMEOUT * HZ);
&& time_before(jiffies, wait_reset)) {
unsigned long wait_reset;
wait_reset = jiffies + (MAX_LOOP_TIMEOUT * HZ);
ha->dpc_active) && time_before(jiffies, wait_reset)) {
shadow->wait_reset = 1;
err = wait_event_interruptible(shadow->wq_reset, shadow->wait_reset);
int wait_reset; /* reset work queue condition */