Symbol: wa_masked_en
drivers/gpu/drm/i915/gt/intel_workarounds.c
1079
wa_masked_en(wal, CACHE_MODE_0, CM0_PIPELINED_RENDER_FLUSH_DISABLE);
drivers/gpu/drm/i915/gt/intel_workarounds.c
1087
wa_masked_en(wal, _3D_CHICKEN2, _3D_CHICKEN2_WM_READ_PIPELINED);
drivers/gpu/drm/i915/gt/intel_workarounds.c
2285
wa_masked_en(wal,
drivers/gpu/drm/i915/gt/intel_workarounds.c
2328
wa_masked_en(wal,
drivers/gpu/drm/i915/gt/intel_workarounds.c
2336
wa_masked_en(wal,
drivers/gpu/drm/i915/gt/intel_workarounds.c
2381
wa_masked_en(wal, GEN9_CSFE_CHICKEN1_RCS,
drivers/gpu/drm/i915/gt/intel_workarounds.c
2393
wa_masked_en(wal,
drivers/gpu/drm/i915/gt/intel_workarounds.c
2453
wa_masked_en(wal,
drivers/gpu/drm/i915/gt/intel_workarounds.c
2469
wa_masked_en(wal,
drivers/gpu/drm/i915/gt/intel_workarounds.c
2476
wa_masked_en(wal,
drivers/gpu/drm/i915/gt/intel_workarounds.c
2509
wa_masked_en(wal,
drivers/gpu/drm/i915/gt/intel_workarounds.c
2520
wa_masked_en(wal,
drivers/gpu/drm/i915/gt/intel_workarounds.c
2539
wa_masked_en(wal,
drivers/gpu/drm/i915/gt/intel_workarounds.c
2547
wa_masked_en(wal,
drivers/gpu/drm/i915/gt/intel_workarounds.c
2573
wa_masked_en(wal,
drivers/gpu/drm/i915/gt/intel_workarounds.c
2580
wa_masked_en(wal,
drivers/gpu/drm/i915/gt/intel_workarounds.c
2606
wa_masked_en(wal,
drivers/gpu/drm/i915/gt/intel_workarounds.c
2616
wa_masked_en(wal,
drivers/gpu/drm/i915/gt/intel_workarounds.c
2621
wa_masked_en(wal,
drivers/gpu/drm/i915/gt/intel_workarounds.c
2625
wa_masked_en(wal,
drivers/gpu/drm/i915/gt/intel_workarounds.c
2757
wa_masked_en(wal, GEN12_RCU_MODE, XEHP_RCU_MODE_FIXED_SLICE_CCS_MODE);
drivers/gpu/drm/i915/gt/intel_workarounds.c
2764
wa_masked_en(wal, XEHP_CCS_MODE, mode);
drivers/gpu/drm/i915/gt/intel_workarounds.c
2835
wa_masked_en(wal, VFG_PREEMPTION_CHICKEN, POLYGON_TRIFAN_LINELOOP_DISABLE);
drivers/gpu/drm/i915/gt/intel_workarounds.c
339
wa_masked_en(wal, INSTPM, INSTPM_FORCE_ORDERING);
drivers/gpu/drm/i915/gt/intel_workarounds.c
348
wa_masked_en(wal, INSTPM, INSTPM_FORCE_ORDERING);
drivers/gpu/drm/i915/gt/intel_workarounds.c
357
wa_masked_en(wal,
drivers/gpu/drm/i915/gt/intel_workarounds.c
365
wa_masked_en(wal, INSTPM, INSTPM_FORCE_ORDERING);
drivers/gpu/drm/i915/gt/intel_workarounds.c
368
wa_masked_en(wal, RING_MI_MODE(RENDER_RING_BASE), ASYNC_FLIP_PERF_DISABLE);
drivers/gpu/drm/i915/gt/intel_workarounds.c
380
wa_masked_en(wal, HDC_CHICKEN0,
drivers/gpu/drm/i915/gt/intel_workarounds.c
395
wa_masked_en(wal, CACHE_MODE_1, GEN8_4x4_STC_OPTIMIZATION_DISABLE);
drivers/gpu/drm/i915/gt/intel_workarounds.c
431
wa_masked_en(wal, HDC_CHICKEN0,
drivers/gpu/drm/i915/gt/intel_workarounds.c
447
wa_masked_en(wal, HIZ_CHICKEN, CHV_HZ_8X8_MODE_IN_1X);
drivers/gpu/drm/i915/gt/intel_workarounds.c
461
wa_masked_en(wal, COMMON_SLICE_CHICKEN2,
drivers/gpu/drm/i915/gt/intel_workarounds.c
481
wa_masked_en(wal, CACHE_MODE_1,
drivers/gpu/drm/i915/gt/intel_workarounds.c
490
wa_masked_en(wal, HDC_CHICKEN0,
drivers/gpu/drm/i915/gt/intel_workarounds.c
508
wa_masked_en(wal, HDC_CHICKEN0,
drivers/gpu/drm/i915/gt/intel_workarounds.c
543
wa_masked_en(wal, GEN9_WM_CHICKEN3, GEN9_FACTOR_IN_CLR_VAL_HIZ);
drivers/gpu/drm/i915/gt/intel_workarounds.c
603
wa_masked_en(wal, COMMON_SLICE_CHICKEN2,
drivers/gpu/drm/i915/gt/intel_workarounds.c
616
wa_masked_en(wal, COMMON_SLICE_CHICKEN2,
drivers/gpu/drm/i915/gt/intel_workarounds.c
630
wa_masked_en(wal, COMMON_SLICE_CHICKEN2,
drivers/gpu/drm/i915/gt/intel_workarounds.c
640
wa_masked_en(wal, COMMON_SLICE_CHICKEN2,
drivers/gpu/drm/i915/gt/intel_workarounds.c
694
wa_masked_en(wal, CACHE_MODE_0_GEN7,
drivers/gpu/drm/i915/gt/intel_workarounds.c
731
wa_masked_en(wal, GEN11_COMMON_SLICE_CHICKEN3,
drivers/gpu/drm/i915/gt/intel_workarounds.c
765
wa_masked_en(wal, HIZ_CHICKEN, HZ_DEPTH_TEST_LE_GE_OPT_DISABLE);
drivers/gpu/drm/i915/gt/intel_workarounds.c
768
wa_masked_en(wal, COMMON_SLICE_CHICKEN4, DISABLE_TDC_LOAD_BALANCING_CALC);
drivers/gpu/drm/i915/gt/intel_workarounds.c
788
wa_masked_en(wal, HIZ_CHICKEN,
drivers/gpu/drm/i915/gt/intel_workarounds.c
808
wa_masked_en(wal, CACHE_MODE_1, MSAA_OPTIMIZATION_REDUC_DISABLE);
drivers/gpu/drm/i915/gt/intel_workarounds.c
856
wa_masked_en(wal, CACHE_MODE_1, MSAA_OPTIMIZATION_REDUC_DISABLE);