vt8500_port
struct vt8500_port *vt8500_port = container_of(port,
struct vt8500_port,
vt8500_port->ier &= ~TX_FIFO_INTS;
vt8500_write(port, vt8500_port->ier, VT8500_URIER);
struct vt8500_port *vt8500_port = container_of(port,
struct vt8500_port,
vt8500_port->ier &= ~RX_FIFO_INTS;
vt8500_write(port, vt8500_port->ier, VT8500_URIER);
struct vt8500_port *vt8500_port = container_of(port,
struct vt8500_port,
vt8500_port->ier |= TCTS;
vt8500_write(port, vt8500_port->ier, VT8500_URIER);
struct vt8500_port *vt8500_port = container_of(port,
struct vt8500_port,
vt8500_port->ier &= ~TX_FIFO_INTS;
vt8500_write(port, vt8500_port->ier, VT8500_URIER);
vt8500_port->ier |= TX_FIFO_INTS;
vt8500_write(port, vt8500_port->ier, VT8500_URIER);
struct vt8500_port *vt8500_port =
container_of(port, struct vt8500_port, uart);
div = ((vt8500_port->clk_predivisor - 1) & 0xf) << 16;
struct vt8500_port *vt8500_port =
container_of(port, struct vt8500_port, uart);
snprintf(vt8500_port->name, sizeof(vt8500_port->name),
vt8500_port->name, port);
struct vt8500_port *vt8500_port =
container_of(port, struct vt8500_port, uart);
vt8500_port->ier = 0;
vt8500_write(&vt8500_port->uart, 0, VT8500_URIER);
vt8500_write(&vt8500_port->uart, 0x880, VT8500_URFCR);
struct vt8500_port *vt8500_port =
container_of(port, struct vt8500_port, uart);
lcr = vt8500_read(&vt8500_port->uart, VT8500_URLCR);
if (vt8500_port->vt8500_uart_flags & VT8500_HAS_SWRTSCTS_SWITCH)
vt8500_write(&vt8500_port->uart, lcr, VT8500_URLCR);
vt8500_write(&vt8500_port->uart, 0x88c, VT8500_URFCR);
while ((vt8500_read(&vt8500_port->uart, VT8500_URFCR) & 0xc)
vt8500_port->ier = RX_FIFO_INTS | TX_FIFO_INTS;
if (UART_ENABLE_MS(&vt8500_port->uart, termios->c_cflag))
vt8500_port->ier |= TCTS;
vt8500_write(&vt8500_port->uart, 0x881, VT8500_URFCR);
vt8500_write(&vt8500_port->uart, vt8500_port->ier, VT8500_URIER);
struct vt8500_port *vt8500_port =
container_of(port, struct vt8500_port, uart);
return vt8500_port->name;
static struct vt8500_port *vt8500_uart_ports[VT8500_MAX_PORTS];
struct vt8500_port *vt8500_port = vt8500_uart_ports[co->index];
ier = vt8500_read(&vt8500_port->uart, VT8500_URIER);
vt8500_write(&vt8500_port->uart, VT8500_URIER, 0);
uart_console_write(&vt8500_port->uart, s, count,
wait_for_xmitr(&vt8500_port->uart);
vt8500_write(&vt8500_port->uart, VT8500_URIER, ier);
struct vt8500_port *vt8500_port;
vt8500_port = vt8500_uart_ports[co->index];
if (!vt8500_port)
return uart_set_options(&vt8500_port->uart,
struct vt8500_port *vt8500_port;
vt8500_port = devm_kzalloc(&pdev->dev, sizeof(struct vt8500_port),
if (!vt8500_port)
vt8500_port->uart.membase = devm_platform_get_and_ioremap_resource(pdev, 0, &mmres);
if (IS_ERR(vt8500_port->uart.membase))
return PTR_ERR(vt8500_port->uart.membase);
vt8500_port->clk = of_clk_get(pdev->dev.of_node, 0);
if (IS_ERR(vt8500_port->clk)) {
ret = clk_prepare_enable(vt8500_port->clk);
vt8500_port->vt8500_uart_flags = *flags;
vt8500_port->clk_predivisor = DIV_ROUND_CLOSEST(
clk_get_rate(vt8500_port->clk),
vt8500_port->uart.type = PORT_VT8500;
vt8500_port->uart.iotype = UPIO_MEM;
vt8500_port->uart.mapbase = mmres->start;
vt8500_port->uart.irq = irq;
vt8500_port->uart.fifosize = 16;
vt8500_port->uart.ops = &vt8500_uart_pops;
vt8500_port->uart.line = port;
vt8500_port->uart.dev = &pdev->dev;
vt8500_port->uart.flags = UPF_IOREMAP | UPF_BOOT_AUTOCONF;
vt8500_port->uart.has_sysrq = IS_ENABLED(CONFIG_SERIAL_VT8500_CONSOLE);
vt8500_port->uart.uartclk = 16 * clk_get_rate(vt8500_port->clk) /
vt8500_port->clk_predivisor /
snprintf(vt8500_port->name, sizeof(vt8500_port->name),
vt8500_uart_ports[port] = vt8500_port;
uart_add_one_port(&vt8500_uart_driver, &vt8500_port->uart);
platform_set_drvdata(pdev, vt8500_port);