vsc85xx_csr_read
u32 vsc85xx_csr_read(struct phy_device *phydev,
rd_dat = vsc85xx_csr_read(phydev, MACRO_CTRL, PHY_S6G_PLL5G_CFG2);
return read_poll_timeout(vsc85xx_csr_read, rd_dat,
return read_poll_timeout(vsc85xx_csr_read, rd_dat,
val = vsc85xx_csr_read(phydev, PHY_MCB_TARGET, reg);
rd_dat = vsc85xx_csr_read(phydev, MACRO_CTRL, PHY_S6G_PLL5G_CFG2);
rd_dat = vsc85xx_csr_read(phydev, MACRO_CTRL, PHY_S6G_PLL5G_CFG2);
val32 = vsc85xx_csr_read(phydev, MACRO_CTRL,
val32 = vsc85xx_csr_read(phydev, MACRO_CTRL,
val32 = vsc85xx_csr_read(phydev, MACRO_CTRL,