Symbol: vsc8584_macsec_phy_write
drivers/net/phy/mscc/mscc_macsec.c
100
vsc8584_macsec_phy_write(phydev, bank, MSCC_MS_SAM_CP_TAG,
drivers/net/phy/mscc/mscc_macsec.c
1008
vsc8584_macsec_phy_write(phydev, MACSEC_EGR, MSCC_MS_AIC_CTRL, 0xf);
drivers/net/phy/mscc/mscc_macsec.c
1009
vsc8584_macsec_phy_write(phydev, MACSEC_EGR, MSCC_MS_INTR_CTRL_STATUS,
drivers/net/phy/mscc/mscc_macsec.c
117
vsc8584_macsec_phy_write(phydev, bank, MSCC_MS_SAM_NM_FLOW_NCP,
drivers/net/phy/mscc/mscc_macsec.c
134
vsc8584_macsec_phy_write(phydev, bank, MSCC_MS_SAM_NM_FLOW_CP,
drivers/net/phy/mscc/mscc_macsec.c
166
vsc8584_macsec_phy_write(phydev, bank, MSCC_MS_PARAMS2_IG_CC_CONTROL,
drivers/net/phy/mscc/mscc_macsec.c
169
vsc8584_macsec_phy_write(phydev, bank, MSCC_MS_PARAMS2_IG_CP_TAG,
drivers/net/phy/mscc/mscc_macsec.c
181
vsc8584_macsec_phy_write(phydev, bank, MSCC_MS_ENA_CFG,
drivers/net/phy/mscc/mscc_macsec.c
186
vsc8584_macsec_phy_write(phydev, bank, MSCC_MS_ENA_CFG,
drivers/net/phy/mscc/mscc_macsec.c
189
vsc8584_macsec_phy_write(phydev, bank, MSCC_MS_STATUS_CONTEXT_CTRL,
drivers/net/phy/mscc/mscc_macsec.c
191
vsc8584_macsec_phy_write(phydev, bank, MSCC_MS_MISC_CONTROL,
drivers/net/phy/mscc/mscc_macsec.c
198
vsc8584_macsec_phy_write(phydev, bank, MSCC_MS_COUNT_CONTROL, val);
drivers/net/phy/mscc/mscc_macsec.c
201
vsc8584_macsec_phy_write(phydev, bank, MSCC_MS_PP_CTRL,
drivers/net/phy/mscc/mscc_macsec.c
204
vsc8584_macsec_phy_write(phydev, bank, MSCC_MS_BLOCK_CTX_UPDATE, 0x3);
drivers/net/phy/mscc/mscc_macsec.c
208
vsc8584_macsec_phy_write(phydev, bank, MSCC_MS_COUNT_CONTROL, val);
drivers/net/phy/mscc/mscc_macsec.c
211
vsc8584_macsec_phy_write(phydev, bank, MSCC_MS_NON_VLAN_MTU_CHECK,
drivers/net/phy/mscc/mscc_macsec.c
216
vsc8584_macsec_phy_write(phydev, bank, MSCC_MS_VLAN_MTU_CHECK(i),
drivers/net/phy/mscc/mscc_macsec.c
223
vsc8584_macsec_phy_write(phydev, bank, MSCC_MS_INTR_CTRL_STATUS, val);
drivers/net/phy/mscc/mscc_macsec.c
225
vsc8584_macsec_phy_write(phydev, bank, MSCC_MS_FC_CFG,
drivers/net/phy/mscc/mscc_macsec.c
238
vsc8584_macsec_phy_write(phydev, bank, MSCC_MS_ENA_CFG,
drivers/net/phy/mscc/mscc_macsec.c
252
vsc8584_macsec_phy_write(phydev, bank, 0x1c + i, 0);
drivers/net/phy/mscc/mscc_macsec.c
259
vsc8584_macsec_phy_write(phydev, bank,
drivers/net/phy/mscc/mscc_macsec.c
265
vsc8584_macsec_phy_write(phydev, bank,
drivers/net/phy/mscc/mscc_macsec.c
278
vsc8584_macsec_phy_write(phydev, bank,
drivers/net/phy/mscc/mscc_macsec.c
281
vsc8584_macsec_phy_write(phydev, bank, MSCC_MAC_CFG_PKTINF_CFG,
drivers/net/phy/mscc/mscc_macsec.c
294
vsc8584_macsec_phy_write(phydev, bank, MSCC_MAC_CFG_MODE_CFG, val);
drivers/net/phy/mscc/mscc_macsec.c
299
vsc8584_macsec_phy_write(phydev, bank, MSCC_MAC_CFG_MAXLEN_CFG, val);
drivers/net/phy/mscc/mscc_macsec.c
301
vsc8584_macsec_phy_write(phydev, bank, MSCC_MAC_CFG_ADV_CHK_CFG,
drivers/net/phy/mscc/mscc_macsec.c
309
vsc8584_macsec_phy_write(phydev, bank, MSCC_MAC_CFG_LFS_CFG, val);
drivers/net/phy/mscc/mscc_macsec.c
311
vsc8584_macsec_phy_write(phydev, bank, MSCC_MAC_CFG_ENA_CFG,
drivers/net/phy/mscc/mscc_macsec.c
330
vsc8584_macsec_phy_write(phydev, FC_BUFFER,
drivers/net/phy/mscc/mscc_macsec.c
339
vsc8584_macsec_phy_write(phydev, FC_BUFFER, MSCC_FCBUF_MODE_CFG, val);
drivers/net/phy/mscc/mscc_macsec.c
341
vsc8584_macsec_phy_write(phydev, FC_BUFFER, MSCC_FCBUF_PPM_RATE_ADAPT_THRESH_CFG,
drivers/net/phy/mscc/mscc_macsec.c
351
vsc8584_macsec_phy_write(phydev, FC_BUFFER,
drivers/net/phy/mscc/mscc_macsec.c
356
vsc8584_macsec_phy_write(phydev, FC_BUFFER, MSCC_FCBUF_ENA_CFG, val);
drivers/net/phy/mscc/mscc_macsec.c
364
vsc8584_macsec_phy_write(phydev, proc_bank,
drivers/net/phy/mscc/mscc_macsec.c
394
vsc8584_macsec_phy_write(phydev, bank, MSCC_MS_SAM_MATCH_SCI_LO(idx),
drivers/net/phy/mscc/mscc_macsec.c
396
vsc8584_macsec_phy_write(phydev, bank, MSCC_MS_SAM_MATCH_SCI_HI(idx),
drivers/net/phy/mscc/mscc_macsec.c
403
vsc8584_macsec_phy_write(phydev, bank, MSCC_MS_SAM_MAC_SA_MATCH_HI(idx),
drivers/net/phy/mscc/mscc_macsec.c
409
vsc8584_macsec_phy_write(phydev, bank, MSCC_MS_SAM_MISC_MATCH(idx), match);
drivers/net/phy/mscc/mscc_macsec.c
410
vsc8584_macsec_phy_write(phydev, bank, MSCC_MS_SAM_MASK(idx), mask);
drivers/net/phy/mscc/mscc_macsec.c
445
vsc8584_macsec_phy_write(phydev, bank, MSCC_MS_SAM_FLOW_CTRL(idx), val);
drivers/net/phy/mscc/mscc_macsec.c
472
vsc8584_macsec_phy_write(phydev, bank, MSCC_MS_SAM_ENTRY_SET1, BIT(idx));
drivers/net/phy/mscc/mscc_macsec.c
477
vsc8584_macsec_phy_write(phydev, bank, MSCC_MS_SAM_FLOW_CTRL(idx), val);
drivers/net/phy/mscc/mscc_macsec.c
487
vsc8584_macsec_phy_write(phydev, bank, MSCC_MS_SAM_ENTRY_CLEAR1, BIT(idx));
drivers/net/phy/mscc/mscc_macsec.c
492
vsc8584_macsec_phy_write(phydev, bank, MSCC_MS_SAM_FLOW_CTRL(idx), val);
drivers/net/phy/mscc/mscc_macsec.c
555
vsc8584_macsec_phy_write(phydev, bank, MSCC_MS_XFORM_REC(index, rec++),
drivers/net/phy/mscc/mscc_macsec.c
559
vsc8584_macsec_phy_write(phydev, bank, MSCC_MS_XFORM_REC(index, rec++),
drivers/net/phy/mscc/mscc_macsec.c
564
vsc8584_macsec_phy_write(phydev, bank,
drivers/net/phy/mscc/mscc_macsec.c
570
vsc8584_macsec_phy_write(phydev, bank,
drivers/net/phy/mscc/mscc_macsec.c
575
vsc8584_macsec_phy_write(phydev, bank, MSCC_MS_XFORM_REC(index, rec++),
drivers/net/phy/mscc/mscc_macsec.c
581
vsc8584_macsec_phy_write(phydev, bank,
drivers/net/phy/mscc/mscc_macsec.c
587
vsc8584_macsec_phy_write(phydev, bank, MSCC_MS_XFORM_REC(index, rec++),
drivers/net/phy/mscc/mscc_macsec.c
589
vsc8584_macsec_phy_write(phydev, bank, MSCC_MS_XFORM_REC(index, rec++),
drivers/net/phy/mscc/mscc_macsec.c
593
vsc8584_macsec_phy_write(phydev, bank, MSCC_MS_XFORM_REC(index, rec++),