vsc73xx_write
vsc73xx_write(vsc, VSC73XX_BLOCK_MAC,
vsc73xx_write(vsc, VSC73XX_BLOCK_MAC,
vsc73xx_write(vsc, VSC73XX_BLOCK_MAC,
vsc73xx_write(vsc, VSC73XX_BLOCK_MAC,
vsc73xx_write(vsc, VSC73XX_BLOCK_MAC,
vsc73xx_write(vsc, VSC73XX_BLOCK_MAC, port, VSC73XX_MAC_CFG,
vsc73xx_write(vsc, VSC73XX_BLOCK_MAC,
vsc73xx_write(vsc, VSC73XX_BLOCK_MAC, port, VSC73XX_MAC_CFG, val);
vsc73xx_write(vsc, VSC73XX_BLOCK_MAC, port, VSC73XX_FCCONF,
vsc73xx_write(vsc, VSC73XX_BLOCK_MAC, port,
return vsc73xx_write(vsc, VSC73XX_BLOCK_MAC, port,
ret = vsc73xx_write(vsc, VSC73XX_BLOCK_ANALYZER, 0,
ret = vsc73xx_write(vsc, VSC73XX_BLOCK_ANALYZER, 0, VSC73XX_MACHDATA,
ret = vsc73xx_write(vsc, VSC73XX_BLOCK_ANALYZER, 0, VSC73XX_MACLDATA,
ret = vsc73xx_write(vsc, VSC73XX_BLOCK_ANALYZER, 0, VSC73XX_MACTINDX,
return vsc73xx_write(vsc, block, subblock, reg, tmp);
ret = vsc73xx_write(vsc, VSC73XX_BLOCK_MII, VSC73XX_BLOCK_MII_INTERNAL,
ret = vsc73xx_write(vsc, VSC73XX_BLOCK_MII, VSC73XX_BLOCK_MII_INTERNAL,
vsc73xx_write(vsc, VSC73XX_BLOCK_ANALYZER, 0, VSC73XX_VLANTIDX, vid);
vsc73xx_write(vsc, VSC73XX_BLOCK_ANALYZER, 0, VSC73XX_VLANTIDX, vid);
return vsc73xx_write(vsc, VSC73XX_BLOCK_SYSTEM, 0, VSC73XX_GMIIDELAY,
vsc73xx_write(vsc, VSC73XX_BLOCK_SYSTEM, 0, VSC73XX_GLORESET,
vsc73xx_write(vsc, VSC73XX_BLOCK_MEMINIT,
vsc73xx_write(vsc, VSC73XX_BLOCK_ANALYZER, 0,
vsc73xx_write(vsc, VSC73XX_BLOCK_ANALYZER, 0,
vsc73xx_write(vsc, VSC73XX_BLOCK_MAC, 0x1f,
vsc73xx_write(vsc, VSC73XX_BLOCK_MAC, 4,
vsc73xx_write(vsc, VSC73XX_BLOCK_ANALYZER, 0, VSC73XX_VLANMASK,
vsc73xx_write(vsc, VSC73XX_BLOCK_ANALYZER, 0, VSC73XX_IFLODMSK,
vsc73xx_write(vsc, VSC73XX_BLOCK_MII, VSC73XX_BLOCK_MII_INTERNAL,
vsc73xx_write(vsc, VSC73XX_BLOCK_SYSTEM, 0, VSC73XX_GLORESET,
vsc73xx_write(vsc, VSC73XX_BLOCK_MAC,
vsc73xx_write(vsc, VSC73XX_BLOCK_MAC,
vsc73xx_write(vsc, VSC73XX_BLOCK_MAC,