drivers/gpu/drm/amd/display/dc/dcn30/dcn30_vpg.c

252

const struct dcn30_vpg_registers *vpg_regs,

drivers/gpu/drm/amd/display/dc/dcn30/dcn30_vpg.c

261

vpg3->regs = vpg_regs;

drivers/gpu/drm/amd/display/dc/dcn30/dcn30_vpg.h

152

const struct dcn30_vpg_registers *vpg_regs,

drivers/gpu/drm/amd/display/dc/dcn31/dcn31_vpg.c

80

const struct dcn31_vpg_registers *vpg_regs,

drivers/gpu/drm/amd/display/dc/dcn31/dcn31_vpg.c

89

vpg31->regs = vpg_regs;

drivers/gpu/drm/amd/display/dc/dcn31/dcn31_vpg.h

159

const struct dcn31_vpg_registers *vpg_regs,

drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

1016

&vpg_regs[inst],

drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

275

static const struct dcn30_vpg_registers vpg_regs[] = {

drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

276

vpg_regs(0),

drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

277

vpg_regs(1),

drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

278

vpg_regs(2),

drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

279

vpg_regs(3),

drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

280

vpg_regs(4),

drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

281

vpg_regs(5),

drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

282

vpg_regs(6),

drivers/gpu/drm/amd/display/dc/resource/dcn301/dcn301_resource.c

272

static const struct dcn30_vpg_registers vpg_regs[] = {

drivers/gpu/drm/amd/display/dc/resource/dcn301/dcn301_resource.c

273

vpg_regs(0),

drivers/gpu/drm/amd/display/dc/resource/dcn301/dcn301_resource.c

274

vpg_regs(1),

drivers/gpu/drm/amd/display/dc/resource/dcn301/dcn301_resource.c

275

vpg_regs(2),

drivers/gpu/drm/amd/display/dc/resource/dcn301/dcn301_resource.c

276

vpg_regs(3),

drivers/gpu/drm/amd/display/dc/resource/dcn301/dcn301_resource.c

987

&vpg_regs[inst],

drivers/gpu/drm/amd/display/dc/resource/dcn302/dcn302_resource.c

311

static const struct dcn30_vpg_registers vpg_regs[] = {

drivers/gpu/drm/amd/display/dc/resource/dcn302/dcn302_resource.c

312

vpg_regs(0),

drivers/gpu/drm/amd/display/dc/resource/dcn302/dcn302_resource.c

313

vpg_regs(1),

drivers/gpu/drm/amd/display/dc/resource/dcn302/dcn302_resource.c

314

vpg_regs(2),

drivers/gpu/drm/amd/display/dc/resource/dcn302/dcn302_resource.c

315

vpg_regs(3),

drivers/gpu/drm/amd/display/dc/resource/dcn302/dcn302_resource.c

316

vpg_regs(4),

drivers/gpu/drm/amd/display/dc/resource/dcn302/dcn302_resource.c

317

vpg_regs(5)

drivers/gpu/drm/amd/display/dc/resource/dcn302/dcn302_resource.c

335

vpg3_construct(vpg3, ctx, inst, &vpg_regs[inst], &vpg_shift, &vpg_mask);

drivers/gpu/drm/amd/display/dc/resource/dcn303/dcn303_resource.c

307

static const struct dcn30_vpg_registers vpg_regs[] = {

drivers/gpu/drm/amd/display/dc/resource/dcn303/dcn303_resource.c

308

vpg_regs(0),

drivers/gpu/drm/amd/display/dc/resource/dcn303/dcn303_resource.c

309

vpg_regs(1),

drivers/gpu/drm/amd/display/dc/resource/dcn303/dcn303_resource.c

310

vpg_regs(2)

drivers/gpu/drm/amd/display/dc/resource/dcn303/dcn303_resource.c

328

vpg3_construct(vpg3, ctx, inst, &vpg_regs[inst], &vpg_shift, &vpg_mask);

drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c

1204

&vpg_regs[inst],

drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c

289

static const struct dcn31_vpg_registers vpg_regs[] = {

drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c

290

vpg_regs(0),

drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c

291

vpg_regs(1),

drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c

292

vpg_regs(2),

drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c

293

vpg_regs(3),

drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c

294

vpg_regs(4),

drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c

295

vpg_regs(5),

drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c

296

vpg_regs(6),

drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c

297

vpg_regs(7),

drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c

298

vpg_regs(8),

drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c

299

vpg_regs(9),

drivers/gpu/drm/amd/display/dc/resource/dcn314/dcn314_resource.c

1262

&vpg_regs[inst],

drivers/gpu/drm/amd/display/dc/resource/dcn314/dcn314_resource.c

298

static const struct dcn31_vpg_registers vpg_regs[] = {

drivers/gpu/drm/amd/display/dc/resource/dcn314/dcn314_resource.c

299

vpg_regs(0),

drivers/gpu/drm/amd/display/dc/resource/dcn314/dcn314_resource.c

300

vpg_regs(1),

drivers/gpu/drm/amd/display/dc/resource/dcn314/dcn314_resource.c

301

vpg_regs(2),

drivers/gpu/drm/amd/display/dc/resource/dcn314/dcn314_resource.c

302

vpg_regs(3),

drivers/gpu/drm/amd/display/dc/resource/dcn314/dcn314_resource.c

303

vpg_regs(4),

drivers/gpu/drm/amd/display/dc/resource/dcn314/dcn314_resource.c

304

vpg_regs(5),

drivers/gpu/drm/amd/display/dc/resource/dcn314/dcn314_resource.c

305

vpg_regs(6),

drivers/gpu/drm/amd/display/dc/resource/dcn314/dcn314_resource.c

306

vpg_regs(7),

drivers/gpu/drm/amd/display/dc/resource/dcn314/dcn314_resource.c

307

vpg_regs(8),

drivers/gpu/drm/amd/display/dc/resource/dcn314/dcn314_resource.c

308

vpg_regs(9),

drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c

1203

&vpg_regs[inst],

drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c

292

static const struct dcn31_vpg_registers vpg_regs[] = {

drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c

293

vpg_regs(0),

drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c

294

vpg_regs(1),

drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c

295

vpg_regs(2),

drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c

296

vpg_regs(3),

drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c

297

vpg_regs(4),

drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c

298

vpg_regs(5),

drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c

299

vpg_regs(6),

drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c

300

vpg_regs(7),

drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c

301

vpg_regs(8),

drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c

302

vpg_regs(9),

drivers/gpu/drm/amd/display/dc/resource/dcn316/dcn316_resource.c

1196

&vpg_regs[inst],

drivers/gpu/drm/amd/display/dc/resource/dcn316/dcn316_resource.c

278

static const struct dcn31_vpg_registers vpg_regs[] = {

drivers/gpu/drm/amd/display/dc/resource/dcn316/dcn316_resource.c

279

vpg_regs(0),

drivers/gpu/drm/amd/display/dc/resource/dcn316/dcn316_resource.c

280

vpg_regs(1),

drivers/gpu/drm/amd/display/dc/resource/dcn316/dcn316_resource.c

281

vpg_regs(2),

drivers/gpu/drm/amd/display/dc/resource/dcn316/dcn316_resource.c

282

vpg_regs(3),

drivers/gpu/drm/amd/display/dc/resource/dcn316/dcn316_resource.c

283

vpg_regs(4),

drivers/gpu/drm/amd/display/dc/resource/dcn316/dcn316_resource.c

284

vpg_regs(5),

drivers/gpu/drm/amd/display/dc/resource/dcn316/dcn316_resource.c

285

vpg_regs(6),

drivers/gpu/drm/amd/display/dc/resource/dcn316/dcn316_resource.c

286

vpg_regs(7),

drivers/gpu/drm/amd/display/dc/resource/dcn316/dcn316_resource.c

287

vpg_regs(8),

drivers/gpu/drm/amd/display/dc/resource/dcn316/dcn316_resource.c

288

vpg_regs(9),

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

1161

#define REG_STRUCT vpg_regs

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

1174

&vpg_regs[inst],

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

257

static struct dcn30_vpg_registers vpg_regs[10];

drivers/gpu/drm/amd/display/dc/resource/dcn321/dcn321_resource.c

1142

#define REG_STRUCT vpg_regs

drivers/gpu/drm/amd/display/dc/resource/dcn321/dcn321_resource.c

1155

&vpg_regs[inst],

drivers/gpu/drm/amd/display/dc/resource/dcn321/dcn321_resource.c

256

static struct dcn30_vpg_registers vpg_regs[10];

drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.c

1223

#define REG_STRUCT vpg_regs

drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.c

1236

&vpg_regs[inst],

drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.c

270

static struct dcn31_vpg_registers vpg_regs[10];

drivers/gpu/drm/amd/display/dc/resource/dcn351/dcn351_resource.c

1203

#define REG_STRUCT vpg_regs

drivers/gpu/drm/amd/display/dc/resource/dcn351/dcn351_resource.c

1216

&vpg_regs[inst],

drivers/gpu/drm/amd/display/dc/resource/dcn351/dcn351_resource.c

250

static struct dcn31_vpg_registers vpg_regs[10];

drivers/gpu/drm/amd/display/dc/resource/dcn36/dcn36_resource.c

1210

#define REG_STRUCT vpg_regs

drivers/gpu/drm/amd/display/dc/resource/dcn36/dcn36_resource.c

1223

&vpg_regs[inst],

drivers/gpu/drm/amd/display/dc/resource/dcn36/dcn36_resource.c

255

static struct dcn31_vpg_registers vpg_regs[10];

drivers/gpu/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

1139

#define REG_STRUCT vpg_regs

drivers/gpu/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

1151

&vpg_regs[inst],

drivers/gpu/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

241

static struct dcn31_vpg_registers vpg_regs[9];