drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

1006

vop2_data = vop2->data;

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

1039

if (src_w > vop2_data->max_input.width ||

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

1040

src_h > vop2_data->max_input.height) {

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

1043

vop2_data->max_input.width,

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

1044

vop2_data->max_input.height);

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

1613

const struct vop2_data *vop2_data = vop2->data;

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

1614

const struct vop2_video_port_data *vp_data = &vop2_data->vp[vp->id];

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

2215

const struct vop2_data *vop2_data = vop2->data;

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

2228

for (i = 0; i < vop2_data->nr_vps; i++) {

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

2344

const struct vop2_data *vop2_data = vop2->data;

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

2355

for (i = 0; i < vop2_data->nr_vps; i++) {

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

2360

vp_data = &vop2_data->vp[i];

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

2389

for (i = 0; i < vop2_data->nr_vps; i++) {

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

2442

for (j = 0; j < vop2_data->nr_vps; j++) {

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

2459

for (i = 0; i < vop2_data->nr_vps; i++) {

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

2476

const struct vop2_video_port_data *vp_data = &vop2_data->vp[vp->id];

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

2493

vp->nlayers = vop2_data->win_size / nvps;

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

2563

const struct vop2_data *vop2_data = vop2->data;

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

2567

for (i = 0; i < vop2_data->win_size; i++) {

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

2568

const struct vop2_win_data *win_data = &vop2_data->win[i];

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

2586

vop2->registered_num_wins = vop2_data->win_size;

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

2620

const struct vop2_data *vop2_data;

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

2627

vop2_data = of_device_get_match_data(dev);

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

2628

if (!vop2_data)

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

2632

alloc_size = struct_size(vop2, win, vop2_data->win_size);

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

2638

vop2->data = vop2_data;

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

2639

vop2->ops = vop2_data->ops;

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

2640

vop2->version = vop2_data->version;

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

2663

drm->mode_config.max_width = vop2_data->max_input.width;

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

2664

drm->mode_config.max_height = vop2_data->max_input.height;

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

2676

if (vop2_data->feature & VOP2_FEATURE_HAS_SYS_GRF) {

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

2683

if (vop2_data->feature & VOP2_FEATURE_HAS_VOP_GRF) {

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

2690

if (vop2_data->feature & VOP2_FEATURE_HAS_VO1_GRF) {

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

2697

if (vop2_data->feature & VOP2_FEATURE_HAS_SYS_PMU) {

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

991

const struct vop2_data *vop2_data;

drivers/gpu/drm/rockchip/rockchip_drm_vop2.h

295

const struct vop2_data *data;

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

2507

static const struct vop2_data rk3566_vop = {

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

2526

static const struct vop2_data rk3568_vop = {

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

2545

static const struct vop2_data rk3576_vop = {

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

2564

static const struct vop2_data rk3588_vop = {