vm_dbg
vm_dbg("%s:%p:%d: %016llx %016llx", op, vm, queue_id, iova, iova + range);
vm_dbg("validate: %p", obj);
vm_dbg("%p:%p:%p: %016llx %016llx", vma->vm, vma, vma->gem.obj,
vm_dbg("orig_vma: %p:%p:%p: %016llx %016llx", vm, orig_vma,
vm_dbg("prev_vma: %p:%p: %016llx %016llx", vm, prev_vma, prev_vma->va.addr, prev_vma->va.range);
vm_dbg("next_vma: %p:%p: %016llx %016llx", vm, next_vma, next_vma->va.addr, next_vma->va.range);
vm_dbg("%p:%p:%p: %016llx %016llx", vma->vm, vma, vma->gem.obj,
vm_dbg("");
vm_dbg(>_to_xe(__gt)->drm, "PRL aborted: " fmt, ##__VA_ARGS__); \
vm_dbg(&xe->drm, "%s: %u entries to update\n", bind ? "bind" : "unbind",
vm_dbg(&xe->drm,
vm_dbg(&tile_to_xe(tile)->drm,
vm_dbg(&xe_vma_vm(vma)->xe->drm,
vm_dbg(&xe_vma_vm(vma)->xe->drm,
vm_dbg(&xe_vma_vm(vma)->xe->drm,
vm_dbg(&vm->xe->drm,
vm_dbg(&gpusvm_to_vm(gpusvm)->xe->drm,
vm_dbg(&vm->xe->drm, "Existing VMA start=0x%016llx, vma_end=0x%016llx",
vm_dbg(&vm->xe->drm, "New VMA start=0x%016llx, vma_end=0x%016llx", start, end);
vm_dbg(&xe->drm,
vm_dbg(&xe->drm,
vm_dbg(&xe->drm,
vm_dbg(&xe->drm,
vm_dbg(&range_to_vm(&(r__)->base)->xe->drm, \
vm_dbg(&xe_vma_vm(vma)->xe->drm,
vm_dbg(&xe->drm, "MAP: addr=0x%016llx, range=0x%016llx",
vm_dbg(&xe->drm, "REMAP:UNMAP: addr=0x%016llx, range=0x%016llx, keep=%d",
vm_dbg(&xe->drm,
vm_dbg(&xe->drm,
vm_dbg(&xe->drm, "UNMAP: addr=0x%016llx, range=0x%016llx, keep=%d",
vm_dbg(&xe->drm, "PREFETCH: addr=0x%016llx, range=0x%016llx",
vm_dbg(&vm->xe->drm,
vm_dbg(&xe->drm, "REMAP:SKIP_PREV: addr=0x%016llx, range=0x%016llx",
vm_dbg(&xe->drm, "REMAP:SKIP_NEXT: addr=0x%016llx, range=0x%016llx",
vm_dbg(&vm->xe->drm,
vm_dbg(&vm->xe->drm, "MADVISE_OPS_CREATE: addr=0x%016llx, size=0x%016llx", start, range);
vm_dbg(&vm->xe->drm, "CPU_ADDR_MIRROR_VMA_OPS_CREATE: addr=0x%016llx, size=0x%016llx",
static inline void vm_dbg(const struct drm_device *dev,
vm_dbg(&vm->xe->drm, "VMA's in range: start=0x%016llx, end=0x%016llx", addr, addr + range);
vm_dbg(&vm->xe->drm, "madvise_range-num_vmas = %d\n", madvise_range->num_vmas);