vlv_dpio_read
tmp = vlv_dpio_read(display->drm, phy, CHV_CMN_DW28);
tmp = vlv_dpio_read(display->drm, phy, CHV_CMN_DW6_CH1);
tmp = vlv_dpio_read(display->drm, phy, CHV_CMN_DW30);
val = vlv_dpio_read(display->drm, phy, reg);
val = vlv_dpio_read(display->drm, phy, CHV_CMN_DW5_CH0);
val = vlv_dpio_read(display->drm, phy, CHV_CMN_DW1_CH1);
val = vlv_dpio_read(display->drm, phy, VLV_PCS01_DW10(ch));
val = vlv_dpio_read(display->drm, phy, VLV_PCS23_DW10(ch));
val = vlv_dpio_read(display->drm, phy, VLV_PCS01_DW9(ch));
val = vlv_dpio_read(display->drm, phy, VLV_PCS23_DW9(ch));
val = vlv_dpio_read(display->drm, phy, CHV_TX_DW4(ch, i));
val = vlv_dpio_read(display->drm, phy, CHV_TX_DW2(ch, i));
val = vlv_dpio_read(display->drm, phy, CHV_TX_DW3(ch, i));
val = vlv_dpio_read(display->drm, phy, VLV_PCS01_DW10(ch));
val = vlv_dpio_read(display->drm, phy, VLV_PCS23_DW10(ch));
val = vlv_dpio_read(display->drm, phy, VLV_PCS01_DW0(ch));
val = vlv_dpio_read(display->drm, phy, VLV_PCS23_DW0(ch));
val = vlv_dpio_read(display->drm, phy, VLV_PCS01_DW1(ch));
val = vlv_dpio_read(display->drm, phy, VLV_PCS23_DW1(ch));
val = vlv_dpio_read(display->drm, phy, CHV_CMN_DW5_CH0);
val = vlv_dpio_read(display->drm, phy, CHV_CMN_DW1_CH1);
val = vlv_dpio_read(display->drm, phy, VLV_PCS01_DW8(ch));
val = vlv_dpio_read(display->drm, phy, VLV_PCS23_DW8(ch));
val = vlv_dpio_read(display->drm, phy, CHV_CMN_DW19(ch));
val = vlv_dpio_read(display->drm, phy, VLV_PCS01_DW11(ch));
val = vlv_dpio_read(display->drm, phy, VLV_PCS23_DW11(ch));
val = vlv_dpio_read(display->drm, phy, VLV_PCS01_DW11(ch));
val = vlv_dpio_read(display->drm, phy, VLV_PCS23_DW11(ch));
tmp = vlv_dpio_read(display->drm, phy, VLV_PLL_DW17(ch));
tmp = vlv_dpio_read(display->drm, phy, VLV_REF_DW11);
tmp = vlv_dpio_read(display->drm, phy, VLV_PLL_DW17(ch));
tmp = vlv_dpio_read(display->drm, phy, VLV_REF_DW11);
tmp = vlv_dpio_read(display->drm, phy, VLV_PLL_DW16(ch));
coreclk = vlv_dpio_read(display->drm, phy, VLV_PLL_DW7(ch));
tmp = vlv_dpio_read(display->drm, phy, CHV_PLL_DW3(ch));
tmp = vlv_dpio_read(display->drm, phy, CHV_PLL_DW9(ch));
tmp = vlv_dpio_read(display->drm, phy, CHV_PLL_DW8(ch));
vlv_dpio_read(display->drm, phy, CHV_CMN_DW14(ch)) |
tmp = vlv_dpio_read(display->drm, phy, CHV_CMN_DW14(ch));
val = vlv_dpio_read(display->drm, phy, CHV_CMN_DW14(ch));
tmp = vlv_dpio_read(display->drm, phy, VLV_PLL_DW3(ch));
cmn_dw13 = vlv_dpio_read(display->drm, phy, CHV_CMN_DW13(ch));
pll_dw0 = vlv_dpio_read(display->drm, phy, CHV_PLL_DW0(ch));
pll_dw1 = vlv_dpio_read(display->drm, phy, CHV_PLL_DW1(ch));
pll_dw2 = vlv_dpio_read(display->drm, phy, CHV_PLL_DW2(ch));
pll_dw3 = vlv_dpio_read(display->drm, phy, CHV_PLL_DW3(ch));
u32 vlv_dpio_read(struct drm_device *drm, enum dpio_phy phy, int reg);