drivers/gpu/drm/i915/display/intel_cdclk.c

571

int freq_320 = (vlv_clock_get_hpll_vco(display->drm) << 1) % 320000 != 0 ?

drivers/gpu/drm/i915/display/intel_cdclk.c

604

return DIV_ROUND_CLOSEST(vlv_clock_get_hpll_vco(display->drm) << 1, cdclk) - 1;

drivers/gpu/drm/i915/display/intel_cdclk.c

613

cdclk_config->vco = vlv_clock_get_hpll_vco(display->drm);

drivers/gpu/drm/i915/display/intel_cdclk.c

713

divider = DIV_ROUND_CLOSEST(vlv_clock_get_hpll_vco(display->drm) << 1,

drivers/gpu/drm/i915/display/vlv_clock.c

62

vlv_clock_get_hpll_vco(drm));

drivers/gpu/drm/i915/display/vlv_clock.c

71

vlv_clock_get_hpll_vco(drm));

drivers/gpu/drm/i915/display/vlv_clock.c

81

vlv_clock_get_hpll_vco(drm));

drivers/gpu/drm/i915/display/vlv_clock.h

10

int vlv_clock_get_hpll_vco(struct drm_device *drm);