vlan_prio
u32 vlan_prio;
vlan_prio = (mf_config &
vlan_val |= (vlan_prio << VLAN_PRIO_SHIFT);
V_L2T_W_PRIO(vlan_prio(e)));
e->vlan & VLAN_VID_MASK, vlan_prio(e), e->lport,
u8 vlan_prio;
vlan_prio = skb_vlan_tag_get_prio(skb);
if (!(adapter->vlan_prio_bmap & (1 << vlan_prio)))
headers->vlan_hdr.vlan_prio =
headers->cvlan_hdr.vlan_prio =
headers->vlan_hdr.vlan_prio;
headers->cvlan_hdr.vlan_prio;
__be16 vlan_prio; /* Only last 3 bits valid (valid values: 0..7) */
void otx2_update_bpid_in_rqctx(struct otx2_nic *pfvf, int vlan_prio, int qidx, bool pfc_enable);
void otx2_update_bpid_in_rqctx(struct otx2_nic *pfvf, int vlan_prio, int qidx,
pfvf->queue_to_pfc_map[qidx] = vlan_prio;
aq->cq.bpid = pfvf->bpid[vlan_prio];
npa_aq->aura.nix0_bpid = pfvf->bpid[vlan_prio];
vlan_prio = ntohs(req->packet.vlan_tci) &
vlan_prio >>= 13;
if (pfvf->pfc_en & BIT(vlan_prio)) {
otx2_update_bpid_in_rqctx(pfvf, vlan_prio, qidx, true);
int vlan_prio, qidx, pfc_rule = 0;
u8 vlan_prio;
vlan_prio = skb->vlan_tci >> 13;
if ((vlan_prio > pf->hw.tx_queues - 1) ||
!pf->pfc_alloc_status[vlan_prio])
return vlan_prio;
attr->vlan_prio[vlan_idx] = act->vlan.prio;
u8 vlan_prio[MLX5_FS_VLAN_DEPTH];
flow_act.vlan[0].prio = esw_attr->vlan_prio[0];
flow_act.vlan[1].prio = esw_attr->vlan_prio[1];
__u8 vlan_prio;
u32 skb_prio, u16 vlan_prio);
u32 skb_prio, u16 vlan_prio);
u32 skb_prio, u16 vlan_prio)
if (vlan->ingress_priority_map[vlan_prio & 0x7] && !skb_prio)
else if (!vlan->ingress_priority_map[vlan_prio & 0x7] && skb_prio)
vlan->ingress_priority_map[vlan_prio & 0x7] = skb_prio;
u32 skb_prio, u16 vlan_prio)
u32 vlan_qos = (vlan_prio << VLAN_PRIO_SHIFT) & VLAN_PRIO_MASK;