drivers/crypto/intel/qat/qat_common/icp_qat_fw_la.h

83

cmp_auth, ret_auth, update_state, \

drivers/crypto/intel/qat/qat_common/icp_qat_fw_la.h

97

((update_state & QAT_LA_UPDATE_STATE_MASK) << \

drivers/firmware/arm_scmi/clock.c

309

.update_state = iter_clk_possible_parents_update_state,

drivers/firmware/arm_scmi/clock.c

524

.update_state = iter_clk_describe_update_state,

drivers/firmware/arm_scmi/clock.c

565

.update_state = iter_clk_describe_update_state,

drivers/firmware/arm_scmi/driver.c

1845

ret = iops->update_state(st, i->resp, i->priv);

drivers/firmware/arm_scmi/perf.c

472

.update_state = iter_perf_levels_update_state,

drivers/firmware/arm_scmi/pinctrl.c

294

.update_state = iter_pinctrl_assoc_update_state,

drivers/firmware/arm_scmi/pinctrl.c

404

.update_state = iter_pinctrl_settings_get_update_state,

drivers/firmware/arm_scmi/protocols.h

227

int (*update_state)(struct scmi_iterator_state *st,

drivers/firmware/arm_scmi/sensors.c

359

.update_state = iter_intervals_update_state,

drivers/firmware/arm_scmi/sensors.c

497

.update_state = iter_axes_extended_name_update_state,

drivers/firmware/arm_scmi/sensors.c

532

.update_state = iter_axes_desc_update_state,

drivers/firmware/arm_scmi/sensors.c

697

.update_state = iter_sens_descr_update_state,

drivers/firmware/arm_scmi/vendors/imx/imx-sm-misc.c

465

.update_state = iter_misc_syslog_update_state,

drivers/firmware/arm_scmi/voltage.c

187

.update_state = iter_volt_levels_update_state,

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1005

update_state->pg_pipe_res_update[PG_HUBP][uj] = false;

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1006

update_state->pg_pipe_res_update[PG_DPP][uj] = false;

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1013

update_state->pg_pipe_res_update[PG_OPP][pipe_ctx->stream_res.opp->inst] = false;

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1016

update_state->pg_pipe_res_update[PG_DPSTREAM][pipe_ctx->stream_res.hpo_dp_stream_enc->inst] = false;

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1020

update_state->pg_pipe_res_update[PG_HDMISTREAM][0] = false;

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1023

update_state->pg_pipe_res_update[PG_PHYSYMCLK][dc->links[i]->link_enc_hw_inst] = true;

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1025

update_state->pg_pipe_res_update[PG_PHYSYMCLK][dc->links[i]->link_enc_hw_inst] = false;

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1032

update_state->pg_pipe_res_update[PG_OPTC][ui] = false;

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1042

update_state->pg_pipe_res_update[PG_OPTC][0] = false;

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1047

if (!update_state->pg_pipe_res_update[PG_HUBP][i] &&

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1048

!update_state->pg_pipe_res_update[PG_DPP][i]) {

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1050

update_state->pg_pipe_res_update[PG_HUBP][j] = false;

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1051

update_state->pg_pipe_res_update[PG_DPP][j] = false;

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1061

struct pg_block_update *update_state)

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1068

memset(update_state, 0, sizeof(struct pg_block_update));

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1083

update_state->pg_pipe_res_update[j][new_pipe->plane_res.hubp->inst] = true;

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1086

update_state->pg_pipe_res_update[j][new_pipe->plane_res.dpp->inst] = true;

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1089

update_state->pg_pipe_res_update[j][new_pipe->plane_res.mpcc_inst] = true;

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1092

update_state->pg_pipe_res_update[j][new_pipe->stream_res.dsc->inst] = true;

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1095

update_state->pg_pipe_res_update[j][new_pipe->stream_res.opp->inst] = true;

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1098

update_state->pg_pipe_res_update[j][new_pipe->stream_res.tg->inst] = true;

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1101

update_state->pg_pipe_res_update[j][new_pipe->stream_res.hpo_dp_stream_enc->inst] = true;

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1110

update_state->pg_pipe_res_update[j][new_pipe->plane_res.hubp->inst] = true;

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1115

update_state->pg_pipe_res_update[j][new_pipe->plane_res.dpp->inst] = true;

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1120

update_state->pg_pipe_res_update[j][new_pipe->stream_res.opp->inst] = true;

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1125

update_state->pg_pipe_res_update[j][new_pipe->stream_res.dsc->inst] = true;

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1130

update_state->pg_pipe_res_update[j][new_pipe->stream_res.tg->inst] = true;

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1135

update_state->pg_pipe_res_update[j][new_pipe->stream_res.hpo_dp_stream_enc->inst] = true;

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1142

update_state->pg_pipe_res_update[PG_PHYSYMCLK][dc->links[i]->link_enc_hw_inst] = true;

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1161

update_state->pg_res_update[PG_HPO] = true;

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1164

update_state->pg_pipe_res_update[PG_HDMISTREAM][0] = true;

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1171

update_state->pg_pipe_res_update[PG_DSC][new_pipe->stream_res.dsc->inst]) {

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1172

update_state->pg_pipe_res_update[PG_HUBP][new_pipe->stream_res.dsc->inst] = true;

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1173

update_state->pg_pipe_res_update[PG_DPP][new_pipe->stream_res.dsc->inst] = true;

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1179

update_state->pg_pipe_res_update[PG_HUBP][uj] = true;

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1180

update_state->pg_pipe_res_update[PG_DPP][uj] = true;

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1187

if (update_state->pg_pipe_res_update[PG_HUBP][i] &&

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1188

update_state->pg_pipe_res_update[PG_DPP][i]) {

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1190

update_state->pg_pipe_res_update[PG_HUBP][j] = true;

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1191

update_state->pg_pipe_res_update[PG_DPP][j] = true;

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1224

struct pg_block_update *update_state)

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1235

if (update_state->pg_res_update[PG_HPO]) {

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1242

if (update_state->pg_pipe_res_update[PG_HUBP][pipe_idx] &&

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1243

update_state->pg_pipe_res_update[PG_DPP][pipe_idx]) {

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1250

if (update_state->pg_pipe_res_update[PG_DSC][i]) {

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1257

if (update_state->pg_pipe_res_update[PG_DSC][i]) {

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1262

if (update_state->pg_pipe_res_update[PG_HUBP][i] &&

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1263

update_state->pg_pipe_res_update[PG_DPP][i]) {

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1302

struct pg_block_update *update_state)

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1318

if (update_state->pg_pipe_res_update[PG_DSC][i]) {

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1325

if (update_state->pg_pipe_res_update[PG_HUBP][i] &&

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1326

update_state->pg_pipe_res_update[PG_DPP][i]) {

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1332

if (update_state->pg_pipe_res_update[PG_DSC][i]) {

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1338

if (update_state->pg_res_update[PG_HPO]) {

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1344

struct pg_block_update *update_state, bool power_on)

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1354

if (update_state->pg_pipe_res_update[PG_HUBP][i] &&

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1355

update_state->pg_pipe_res_update[PG_DPP][i]) {

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1359

if (update_state->pg_pipe_res_update[PG_DPSTREAM][i])

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1365

if (update_state->pg_pipe_res_update[PG_PHYSYMCLK][i])

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1369

if (update_state->pg_pipe_res_update[PG_HDMISTREAM][0])

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1374

if (update_state->pg_pipe_res_update[PG_DSC][i]) {

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1387

if (update_state->pg_pipe_res_update[PG_HUBP][i] &&

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1388

update_state->pg_pipe_res_update[PG_DPP][i]) {

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1392

if (update_state->pg_pipe_res_update[PG_DPSTREAM][i])

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1398

if (update_state->pg_pipe_res_update[PG_PHYSYMCLK][i])

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1402

if (update_state->pg_pipe_res_update[PG_HDMISTREAM][0])

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1615

static void dcn35_calc_blocks_to_ungate_for_hw_release(struct dc *dc, struct pg_block_update *update_state)

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1620

memset(update_state, 0, sizeof(struct pg_block_update));

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1624

update_state->pg_pipe_res_update[j][i] = true;

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1626

update_state->pg_res_update[PG_HPO] = true;

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

1627

update_state->pg_res_update[PG_DWB] = true;

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

945

struct pg_block_update *update_state)

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

954

memset(update_state, 0, sizeof(struct pg_block_update));

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

973

update_state->pg_res_update[PG_HPO] = true;

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

975

update_state->pg_res_update[PG_DWB] = true;

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

981

update_state->pg_pipe_res_update[j][ui] = true;

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

987

update_state->pg_pipe_res_update[PG_HUBP][pipe_ctx->plane_res.hubp->inst] = false;

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

990

update_state->pg_pipe_res_update[PG_DPP][pipe_ctx->plane_res.hubp->inst] = false;

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

993

update_state->pg_pipe_res_update[PG_MPCC][pipe_ctx->plane_res.mpcc_inst] = false;

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

996

update_state->pg_pipe_res_update[PG_DSC][pipe_ctx->stream_res.dsc->inst] = false;

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

998

update_state->pg_pipe_res_update[PG_HUBP][pipe_ctx->stream_res.dsc->inst] = false;

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

999

update_state->pg_pipe_res_update[PG_DPP][pipe_ctx->stream_res.dsc->inst] = false;

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.h

69

struct pg_block_update *update_state);

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.h

71

struct pg_block_update *update_state);

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.h

73

struct pg_block_update *update_state);

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.h

75

struct pg_block_update *update_state);

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.h

77

struct pg_block_update *update_state, bool power_on);

drivers/gpu/drm/amd/display/dc/hwss/dcn351/dcn351_hwseq.c

100

struct pg_block_update *update_state)

drivers/gpu/drm/amd/display/dc/hwss/dcn351/dcn351_hwseq.c

109

if (update_state->pg_pipe_res_update[PG_DSC][i]) {

drivers/gpu/drm/amd/display/dc/hwss/dcn351/dcn351_hwseq.c

114

if (update_state->pg_pipe_res_update[PG_HUBP][i] &&

drivers/gpu/drm/amd/display/dc/hwss/dcn351/dcn351_hwseq.c

115

update_state->pg_pipe_res_update[PG_DPP][i]) {

drivers/gpu/drm/amd/display/dc/hwss/dcn351/dcn351_hwseq.c

153

struct pg_block_update *update_state)

drivers/gpu/drm/amd/display/dc/hwss/dcn351/dcn351_hwseq.c

171

if (update_state->pg_pipe_res_update[PG_HUBP][i] &&

drivers/gpu/drm/amd/display/dc/hwss/dcn351/dcn351_hwseq.c

172

update_state->pg_pipe_res_update[PG_DPP][i]) {

drivers/gpu/drm/amd/display/dc/hwss/dcn351/dcn351_hwseq.c

177

if (update_state->pg_pipe_res_update[PG_DSC][i]) {

drivers/gpu/drm/amd/display/dc/hwss/dcn351/dcn351_hwseq.c

39

struct pg_block_update *update_state)

drivers/gpu/drm/amd/display/dc/hwss/dcn351/dcn351_hwseq.c

43

dcn35_calc_blocks_to_gate(dc, context, update_state);

drivers/gpu/drm/amd/display/dc/hwss/dcn351/dcn351_hwseq.c

46

if (!update_state->pg_pipe_res_update[PG_HUBP][i] &&

drivers/gpu/drm/amd/display/dc/hwss/dcn351/dcn351_hwseq.c

47

!update_state->pg_pipe_res_update[PG_DPP][i]) {

drivers/gpu/drm/amd/display/dc/hwss/dcn351/dcn351_hwseq.c

49

update_state->pg_pipe_res_update[PG_HUBP][j] = false;

drivers/gpu/drm/amd/display/dc/hwss/dcn351/dcn351_hwseq.c

50

update_state->pg_pipe_res_update[PG_DPP][j] = false;

drivers/gpu/drm/amd/display/dc/hwss/dcn351/dcn351_hwseq.c

59

struct pg_block_update *update_state)

drivers/gpu/drm/amd/display/dc/hwss/dcn351/dcn351_hwseq.c

63

dcn35_calc_blocks_to_ungate(dc, context, update_state);

drivers/gpu/drm/amd/display/dc/hwss/dcn351/dcn351_hwseq.c

66

if (update_state->pg_pipe_res_update[PG_HUBP][i] &&

drivers/gpu/drm/amd/display/dc/hwss/dcn351/dcn351_hwseq.c

67

update_state->pg_pipe_res_update[PG_DPP][i]) {

drivers/gpu/drm/amd/display/dc/hwss/dcn351/dcn351_hwseq.c

69

update_state->pg_pipe_res_update[PG_HUBP][j] = true;

drivers/gpu/drm/amd/display/dc/hwss/dcn351/dcn351_hwseq.c

70

update_state->pg_pipe_res_update[PG_DPP][j] = true;

drivers/gpu/drm/amd/display/dc/hwss/dcn351/dcn351_hwseq.h

33

struct pg_block_update *update_state);

drivers/gpu/drm/amd/display/dc/hwss/dcn351/dcn351_hwseq.h

35

struct pg_block_update *update_state);

drivers/gpu/drm/amd/display/dc/hwss/dcn351/dcn351_hwseq.h

37

struct pg_block_update *update_state);

drivers/gpu/drm/amd/display/dc/hwss/dcn351/dcn351_hwseq.h

39

struct pg_block_update *update_state);

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1000

update_state->pg_pipe_res_update[j][i] = true;

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1006

update_state->pg_pipe_res_update[PG_HUBP][pipe_ctx->plane_res.hubp->inst] = false;

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1009

update_state->pg_pipe_res_update[PG_DPP][pipe_ctx->plane_res.hubp->inst] = false;

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1012

update_state->pg_pipe_res_update[PG_MPCC][pipe_ctx->plane_res.mpcc_inst] = false;

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1015

update_state->pg_pipe_res_update[PG_DSC][pipe_ctx->stream_res.dsc->inst] = false;

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1017

update_state->pg_pipe_res_update[PG_HUBP][pipe_ctx->stream_res.dsc->inst] = false;

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1018

update_state->pg_pipe_res_update[PG_DPP][pipe_ctx->stream_res.dsc->inst] = false;

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1022

update_state->pg_pipe_res_update[PG_OPP][pipe_ctx->stream_res.opp->inst] = false;

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1025

update_state->pg_pipe_res_update[PG_DPSTREAM][pipe_ctx->stream_res.hpo_dp_stream_enc->inst] = false;

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1028

update_state->pg_res_update[PG_DIO] = false;

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1032

update_state->pg_res_update[PG_HPO] = false;

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1037

update_state->pg_pipe_res_update[PG_HDMISTREAM][0] = false;

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1040

update_state->pg_pipe_res_update[PG_PHYSYMCLK][dc->links[i]->link_enc_hw_inst] = true;

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1042

update_state->pg_pipe_res_update[PG_PHYSYMCLK][dc->links[i]->link_enc_hw_inst] = false;

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1049

update_state->pg_pipe_res_update[PG_OPTC][i] = false;

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1059

update_state->pg_res_update[PG_HPO] = false;

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1108

struct pg_block_update *update_state)

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1115

memset(update_state, 0, sizeof(struct pg_block_update));

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1130

update_state->pg_pipe_res_update[j][new_pipe->plane_res.hubp->inst] = true;

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1133

update_state->pg_pipe_res_update[j][new_pipe->plane_res.dpp->inst] = true;

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1136

update_state->pg_pipe_res_update[j][new_pipe->plane_res.mpcc_inst] = true;

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1139

update_state->pg_pipe_res_update[j][new_pipe->stream_res.dsc->inst] = true;

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1142

update_state->pg_pipe_res_update[j][new_pipe->stream_res.opp->inst] = true;

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1145

update_state->pg_pipe_res_update[j][new_pipe->stream_res.tg->inst] = true;

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1148

update_state->pg_pipe_res_update[j][new_pipe->stream_res.hpo_dp_stream_enc->inst] = true;

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1157

update_state->pg_pipe_res_update[j][new_pipe->plane_res.hubp->inst] = true;

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1162

update_state->pg_pipe_res_update[j][new_pipe->plane_res.dpp->inst] = true;

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1167

update_state->pg_pipe_res_update[j][new_pipe->stream_res.opp->inst] = true;

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1172

update_state->pg_pipe_res_update[j][new_pipe->stream_res.dsc->inst] = true;

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1177

update_state->pg_pipe_res_update[j][new_pipe->stream_res.tg->inst] = true;

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1182

update_state->pg_pipe_res_update[j][new_pipe->stream_res.hpo_dp_stream_enc->inst] = true;

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1189

update_state->pg_pipe_res_update[PG_PHYSYMCLK][dc->links[i]->link_enc_hw_inst] = true;

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1193

update_state->pg_res_update[PG_DIO] = true;

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1214

update_state->pg_res_update[PG_HPO] = true;

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1217

update_state->pg_pipe_res_update[PG_HDMISTREAM][0] = true;

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1219

update_state->pg_res_update[PG_DCCG] = true;

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1220

update_state->pg_res_update[PG_DCIO] = true;

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1221

update_state->pg_res_update[PG_DCHUBBUB] = true;

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1222

update_state->pg_res_update[PG_DCHVM] = true;

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1223

update_state->pg_res_update[PG_DCOH] = true;

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1252

struct pg_block_update *update_state)

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1264

if (update_state->pg_res_update[PG_HPO]) {

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1270

if (update_state->pg_pipe_res_update[PG_HUBP][i] &&

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1271

update_state->pg_pipe_res_update[PG_DPP][i]) {

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1277

if (update_state->pg_res_update[PG_DCHUBBUB]) {

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1283

if (update_state->pg_pipe_res_update[PG_DSC][i]) {

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1290

if (!update_state->pg_pipe_res_update[PG_MPCC][i] ||

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1291

!update_state->pg_pipe_res_update[PG_OPP][i] ||

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1292

!update_state->pg_pipe_res_update[PG_OPTC][i]) {

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1303

if (update_state->pg_res_update[PG_DIO]) {

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1308

if (update_state->pg_res_update[PG_DCCG] &&

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1309

update_state->pg_res_update[PG_DCIO] &&

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1310

update_state->pg_res_update[PG_DCOH]) {

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1342

struct pg_block_update *update_state)

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1353

if (update_state->pg_res_update[PG_DCCG] ||

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1354

update_state->pg_res_update[PG_DCIO] ||

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1355

update_state->pg_res_update[PG_DCOH]) {

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1360

if (update_state->pg_res_update[PG_DIO]) {

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1366

if (update_state->pg_pipe_res_update[PG_MPCC][i] ||

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1367

update_state->pg_pipe_res_update[PG_OPP][i] ||

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1368

update_state->pg_pipe_res_update[PG_OPTC][i]) {

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1379

if (update_state->pg_pipe_res_update[PG_DSC][i]) {

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1385

if (update_state->pg_res_update[PG_DCHUBBUB]) {

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1391

if (update_state->pg_pipe_res_update[PG_HUBP][i] &&

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1392

update_state->pg_pipe_res_update[PG_DPP][i]) {

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1397

if (update_state->pg_res_update[PG_HPO]) {

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1403

struct pg_block_update *update_state, bool power_on)

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1413

if (update_state->pg_pipe_res_update[PG_HUBP][i] &&

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1414

update_state->pg_pipe_res_update[PG_DPP][i]) {

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1418

if (update_state->pg_pipe_res_update[PG_DPSTREAM][i])

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1424

if (update_state->pg_pipe_res_update[PG_PHYSYMCLK][i])

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1428

if (update_state->pg_pipe_res_update[PG_HDMISTREAM][0])

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1433

if (update_state->pg_pipe_res_update[PG_DSC][i]) {

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1446

if (update_state->pg_pipe_res_update[PG_HUBP][i] &&

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1447

update_state->pg_pipe_res_update[PG_DPP][i]) {

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1451

if (update_state->pg_pipe_res_update[PG_DPSTREAM][i])

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1457

if (update_state->pg_pipe_res_update[PG_PHYSYMCLK][i])

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

1461

if (update_state->pg_pipe_res_update[PG_HDMISTREAM][0])

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

966

struct pg_block_update *update_state)

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

973

memset(update_state, 0, sizeof(struct pg_block_update));

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

975

update_state->pg_res_update[PG_DIO] = true;

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

994

update_state->pg_res_update[PG_HPO] = true;

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.h

41

struct pg_block_update *update_state);

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.h

43

struct pg_block_update *update_state);

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.h

45

struct pg_block_update *update_state);

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.h

47

struct pg_block_update *update_state);

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.h

49

struct pg_block_update *update_state, bool power_on);

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

1484

struct pg_block_update *update_state);

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

1486

struct pg_block_update *update_state);

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

1488

struct pg_block_update *update_state);

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

1490

struct pg_block_update *update_state);

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

1492

struct pg_block_update *update_state, bool power_on);

drivers/infiniband/sw/rxe/rxe_req.c

816

update_state(qp, &pkt);

drivers/scsi/aha152x.c

2354

dataphase=update_state(shpnt);

drivers/watchdog/wm831x_wdt.c

31

int update_state;