Symbol: CVMX_PCIE_BAR1_PHYS_BASE
arch/mips/cavium-octeon/dma-octeon.c
37
if (paddr >= CVMX_PCIE_BAR1_PHYS_BASE && paddr < (CVMX_PCIE_BAR1_PHYS_BASE + CVMX_PCIE_BAR1_PHYS_SIZE))
arch/mips/cavium-octeon/dma-octeon.c
38
return paddr - CVMX_PCIE_BAR1_PHYS_BASE + CVMX_PCIE_BAR1_RC_BASE;
arch/mips/cavium-octeon/dma-octeon.c
46
return daddr + CVMX_PCIE_BAR1_PHYS_BASE - CVMX_PCIE_BAR1_RC_BASE;
arch/mips/cavium-octeon/setup.c
1023
memory_exclude_page(CVMX_PCIE_BAR1_PHYS_BASE,
arch/mips/cavium-octeon/setup.c
1025
memory_exclude_page(CVMX_PCIE_BAR1_PHYS_BASE +
arch/mips/pci/pcie-octeon.c
1415
bar1_index.s.addr_idx = (CVMX_PCIE_BAR1_PHYS_BASE >> 22);
arch/mips/pci/pcie-octeon.c
932
bar1_index.s.addr_idx = (CVMX_PCIE_BAR1_PHYS_BASE >> 22);