arch/arm64/kvm/guest.c

301

vcpu_set_reg(vcpu, i, (u32)vcpu_get_reg(vcpu, i));

arch/arm64/kvm/handle_exit.c

83

vcpu_set_reg(vcpu, 0, ~0UL);

arch/arm64/kvm/hyp/include/hyp/switch.h

740

vcpu_set_reg(vcpu, kvm_vcpu_sys_get_rt(vcpu), val);

arch/arm64/kvm/hyp/nvhe/sys_regs.c

584

vcpu_set_reg(vcpu, Rt, params.regval);

arch/arm64/kvm/hyp/vgic-v2-cpuif-proxy.c

87

vcpu_set_reg(vcpu, rd, data);

arch/arm64/kvm/hyp/vgic-v3-sr.c

1015

vcpu_set_reg(vcpu, rt, lr_val & ICH_LR_VIRTUAL_ID_MASK);

arch/arm64/kvm/hyp/vgic-v3-sr.c

1020

vcpu_set_reg(vcpu, rt, FIELD_GET(ICH_VMCR_EL2_VPMR, vmcr));

arch/arm64/kvm/hyp/vgic-v3-sr.c

1035

vcpu_set_reg(vcpu, rt, val);

arch/arm64/kvm/hyp/vgic-v3-sr.c

1056

vcpu_set_reg(vcpu, rt, val);

arch/arm64/kvm/hyp/vgic-v3-sr.c

773

vcpu_set_reg(vcpu, rt, lr_val & ICH_LR_VIRTUAL_ID_MASK);

arch/arm64/kvm/hyp/vgic-v3-sr.c

777

vcpu_set_reg(vcpu, rt, ICC_IAR1_EL1_SPURIOUS);

arch/arm64/kvm/hyp/vgic-v3-sr.c

868

vcpu_set_reg(vcpu, rt, FIELD_GET(ICH_VMCR_EL2_VENG0, vmcr));

arch/arm64/kvm/hyp/vgic-v3-sr.c

873

vcpu_set_reg(vcpu, rt, FIELD_GET(ICH_VMCR_EL2_VENG1, vmcr));

arch/arm64/kvm/hyp/vgic-v3-sr.c

896

vcpu_set_reg(vcpu, rt, __vgic_v3_get_bpr0(vmcr));

arch/arm64/kvm/hyp/vgic-v3-sr.c

901

vcpu_set_reg(vcpu, rt, __vgic_v3_get_bpr1(vmcr));

arch/arm64/kvm/hyp/vgic-v3-sr.c

944

vcpu_set_reg(vcpu, rt, val);

arch/arm64/kvm/hyp/vhe/switch.c

331

vcpu_set_reg(vcpu, kvm_vcpu_sys_get_rt(vcpu), val);

arch/arm64/kvm/hyp/vhe/switch.c

450

vcpu_set_reg(vcpu, rt, __vcpu_sys_reg(vcpu, CPTR_EL2));

arch/arm64/kvm/mmio.c

141

vcpu_set_reg(vcpu, kvm_vcpu_dabt_get_rd(vcpu), data);

arch/arm64/kvm/psci.c

232

vcpu_set_reg(vcpu, i, lower_32_bits(vcpu_get_reg(vcpu, i)));

arch/arm64/kvm/psci.c

398

vcpu_set_reg(vcpu, 0, PSCI_RET_INTERNAL_FAILURE);

arch/arm64/kvm/reset.c

264

vcpu_set_reg(vcpu, 0, reset_state.r0);

arch/arm64/kvm/sys_regs.c

4778

vcpu_set_reg(vcpu, Rt, lower_32_bits(params.regval));

arch/arm64/kvm/sys_regs.c

4779

vcpu_set_reg(vcpu, Rt2, upper_32_bits(params.regval));

arch/arm64/kvm/sys_regs.c

4857

vcpu_set_reg(vcpu, Rt, params.regval);

arch/arm64/kvm/sys_regs.c

4902

vcpu_set_reg(vcpu, Rt, params->regval);

arch/arm64/kvm/sys_regs.c

4924

vcpu_set_reg(vcpu, Rt, params->regval);

arch/arm64/kvm/sys_regs.c

5223

vcpu_set_reg(vcpu, Rt, params.regval);

include/kvm/arm_hypercalls.h

37

vcpu_set_reg(vcpu, 0, a0);

include/kvm/arm_hypercalls.h

38

vcpu_set_reg(vcpu, 1, a1);

include/kvm/arm_hypercalls.h

39

vcpu_set_reg(vcpu, 2, a2);

include/kvm/arm_hypercalls.h

40

vcpu_set_reg(vcpu, 3, a3);

tools/testing/selftests/kvm/arm64/aarch32_id_regs.c

107

vcpu_set_reg(vcpu, reg_id, BAD_ID_REG_VAL);

tools/testing/selftests/kvm/arm64/arch_timer_edge_cases.c

869

vcpu_set_reg(vcpu, KVM_REG_ARM_PTIMER_CNT, cnt);

tools/testing/selftests/kvm/arm64/arch_timer_edge_cases.c

871

vcpu_set_reg(vcpu, KVM_REG_ARM_TIMER_CNT, cnt);

tools/testing/selftests/kvm/arm64/set_id_regs.c

391

vcpu_set_reg(vcpu, reg, val);

tools/testing/selftests/kvm/arm64/set_id_regs.c

692

vcpu_set_reg(vcpu, KVM_ARM64_SYS_REG(SYS_CLIDR_EL1), clidr);

tools/testing/selftests/kvm/arm64/set_id_regs.c

705

vcpu_set_reg(vcpu, KVM_ARM64_SYS_REG(SYS_CTR_EL0), ctr);

tools/testing/selftests/kvm/arm64/set_id_regs.c

715

vcpu_set_reg(vcpu, KVM_ARM64_SYS_REG(id), val);

tools/testing/selftests/kvm/arm64/vpmu_counter_access.c

516

vcpu_set_reg(vcpu, ctxt_reg_alias(vcpu, SYS_SP_EL1), sp);

tools/testing/selftests/kvm/arm64/vpmu_counter_access.c

517

vcpu_set_reg(vcpu, ARM64_CORE_REG(regs.pc), (uint64_t)guest_code);

tools/testing/selftests/kvm/arm64/vpmu_counter_access.c

570

vcpu_set_reg(vcpu, KVM_ARM64_SYS_REG(set_reg_id), max_counters_mask);

tools/testing/selftests/kvm/lib/arm64/processor.c

315

vcpu_set_reg(vcpu, ctxt_reg_alias(vcpu, SYS_CPACR_EL1), 3 << 20);

tools/testing/selftests/kvm/lib/arm64/processor.c

387

vcpu_set_reg(vcpu, ctxt_reg_alias(vcpu, SYS_SCTLR_EL1), sctlr_el1);

tools/testing/selftests/kvm/lib/arm64/processor.c

388

vcpu_set_reg(vcpu, ctxt_reg_alias(vcpu, SYS_TCR_EL1), tcr_el1);

tools/testing/selftests/kvm/lib/arm64/processor.c

389

vcpu_set_reg(vcpu, ctxt_reg_alias(vcpu, SYS_MAIR_EL1), DEFAULT_MAIR_EL1);

tools/testing/selftests/kvm/lib/arm64/processor.c

390

vcpu_set_reg(vcpu, ctxt_reg_alias(vcpu, SYS_TTBR0_EL1), ttbr0_el1);

tools/testing/selftests/kvm/lib/arm64/processor.c

391

vcpu_set_reg(vcpu, KVM_ARM64_SYS_REG(SYS_TPIDR_EL1), vcpu->id);

tools/testing/selftests/kvm/lib/arm64/processor.c

396

vcpu_set_reg(vcpu, KVM_ARM64_SYS_REG(SYS_HCR_EL2),

tools/testing/selftests/kvm/lib/arm64/processor.c

413

vcpu_set_reg(vcpu, ARM64_CORE_REG(regs.pc), (uint64_t)guest_code);

tools/testing/selftests/kvm/lib/arm64/processor.c

431

vcpu_set_reg(vcpu, ctxt_reg_alias(vcpu, SYS_SP_EL1), stack_vaddr + stack_size);

tools/testing/selftests/kvm/lib/arm64/processor.c

461

vcpu_set_reg(vcpu, ARM64_CORE_REG(regs.regs[i]),

tools/testing/selftests/kvm/lib/arm64/processor.c

501

vcpu_set_reg(vcpu, ctxt_reg_alias(vcpu, SYS_VBAR_EL1), (uint64_t)&vectors);

tools/testing/selftests/kvm/lib/riscv/processor.c

233

vcpu_set_reg(vcpu, RISCV_GENERAL_CSR_REG(satp), satp);

tools/testing/selftests/kvm/lib/riscv/processor.c

311

vcpu_set_reg(vcpu, RISCV_CORE_REG(regs.pc), (unsigned long)guest_code);

tools/testing/selftests/kvm/lib/riscv/processor.c

344

vcpu_set_reg(vcpu, RISCV_CORE_REG(regs.gp), current_gp);

tools/testing/selftests/kvm/lib/riscv/processor.c

347

vcpu_set_reg(vcpu, RISCV_CORE_REG(regs.sp), stack_vaddr + stack_size);

tools/testing/selftests/kvm/lib/riscv/processor.c

350

vcpu_set_reg(vcpu, RISCV_GENERAL_CSR_REG(sscratch), vcpu_id);

tools/testing/selftests/kvm/lib/riscv/processor.c

353

vcpu_set_reg(vcpu, RISCV_GENERAL_CSR_REG(stvec), (unsigned long)guest_unexp_trap);

tools/testing/selftests/kvm/lib/riscv/processor.c

396

vcpu_set_reg(vcpu, id, va_arg(ap, uint64_t));

tools/testing/selftests/kvm/lib/riscv/processor.c

447

vcpu_set_reg(vcpu, RISCV_GENERAL_CSR_REG(stvec), (unsigned long)&exception_vectors);

tools/testing/selftests/kvm/mmu_stress_test.c

182

vcpu_set_reg(vcpu, ARM64_CORE_REG(regs.pc),

tools/testing/selftests/kvm/riscv/ebreak_test.c

67

vcpu_set_reg(vcpu, RISCV_CORE_REG(regs.pc), pc + 4);

tools/testing/selftests/kvm/riscv/get-reg-list.c

191

vcpu_set_reg(vcpu, feature, 0);

tools/testing/selftests/kvm/x86/msrs_test.c

278

vcpu_set_reg(vcpu, KVM_X86_REG_KVM(reg), write_val);

tools/testing/selftests/kvm/x86/msrs_test.c

302

vcpu_set_reg(vcpu, KVM_X86_REG_MSR(msr), reset_val);