arch/arm64/include/asm/kvm_emulate.h

519

sctlr = vcpu_read_sys_reg(vcpu, r);

arch/arm64/include/asm/kvm_emulate.h

536

return vcpu_read_sys_reg(vcpu, r) & bit;

arch/arm64/include/asm/kvm_host.h

1199

u64 vcpu_read_sys_reg(const struct kvm_vcpu *, enum vcpu_sysreg);

arch/arm64/include/asm/kvm_mmu.h

214

return (vcpu_read_sys_reg(vcpu, reg) & cache_bits) == cache_bits;

arch/arm64/kvm/at.c

1035

#define perm_idx(v, r, i) ((vcpu_read_sys_reg((v), (r)) >> ((i) * 4)) & 0xf)

arch/arm64/kvm/at.c

107

return vcpu_read_sys_reg(vcpu, TCR2_EL1);

arch/arm64/kvm/at.c

110

return vcpu_read_sys_reg(vcpu, TCR2_EL2);

arch/arm64/kvm/at.c

1366

write_sysreg_el1(vcpu_read_sys_reg(vcpu, TTBR0_EL1), SYS_TTBR0);

arch/arm64/kvm/at.c

1367

write_sysreg_el1(vcpu_read_sys_reg(vcpu, TTBR1_EL1), SYS_TTBR1);

arch/arm64/kvm/at.c

1368

write_sysreg_el1(vcpu_read_sys_reg(vcpu, TCR_EL1), SYS_TCR);

arch/arm64/kvm/at.c

1369

write_sysreg_el1(vcpu_read_sys_reg(vcpu, MAIR_EL1), SYS_MAIR);

arch/arm64/kvm/at.c

1371

write_sysreg_el1(vcpu_read_sys_reg(vcpu, TCR2_EL1), SYS_TCR2);

arch/arm64/kvm/at.c

1373

write_sysreg_el1(vcpu_read_sys_reg(vcpu, PIR_EL1), SYS_PIR);

arch/arm64/kvm/at.c

1374

write_sysreg_el1(vcpu_read_sys_reg(vcpu, PIRE0_EL1), SYS_PIRE0);

arch/arm64/kvm/at.c

1377

write_sysreg_el1(vcpu_read_sys_reg(vcpu, POR_EL1), SYS_POR);

arch/arm64/kvm/at.c

1378

write_sysreg_s(vcpu_read_sys_reg(vcpu, POR_EL0), SYS_POR_EL0);

arch/arm64/kvm/at.c

1381

write_sysreg_el1(vcpu_read_sys_reg(vcpu, SCTLR_EL1), SYS_SCTLR);

arch/arm64/kvm/at.c

1556

par = vcpu_read_sys_reg(vcpu, PAR_EL1);

arch/arm64/kvm/at.c

1565

!(vcpu_read_sys_reg(vcpu, HCR_EL2) & (HCR_VM | HCR_DC)))

arch/arm64/kvm/at.c

158

sctlr = vcpu_read_sys_reg(vcpu, SCTLR_EL1);

arch/arm64/kvm/at.c

159

tcr = vcpu_read_sys_reg(vcpu, TCR_EL1);

arch/arm64/kvm/at.c

161

vcpu_read_sys_reg(vcpu, TTBR1_EL1) :

arch/arm64/kvm/at.c

162

vcpu_read_sys_reg(vcpu, TTBR0_EL1));

arch/arm64/kvm/at.c

166

sctlr = vcpu_read_sys_reg(vcpu, SCTLR_EL2);

arch/arm64/kvm/at.c

167

tcr = vcpu_read_sys_reg(vcpu, TCR_EL2);

arch/arm64/kvm/at.c

169

vcpu_read_sys_reg(vcpu, TTBR1_EL2) :

arch/arm64/kvm/at.c

170

vcpu_read_sys_reg(vcpu, TTBR0_EL2));

arch/arm64/kvm/at.c

904

vcpu_read_sys_reg(vcpu, MAIR_EL1) :

arch/arm64/kvm/at.c

905

vcpu_read_sys_reg(vcpu, MAIR_EL2));

arch/arm64/kvm/at.c

911

vcpu_read_sys_reg(vcpu, SCTLR_EL1) :

arch/arm64/kvm/at.c

912

vcpu_read_sys_reg(vcpu, SCTLR_EL2));

arch/arm64/kvm/at.c

939

sctlr = vcpu_read_sys_reg(vcpu, SCTLR_EL1);

arch/arm64/kvm/at.c

941

sctlr = vcpu_read_sys_reg(vcpu, SCTLR_EL2);

arch/arm64/kvm/at.c

992

wxn = (vcpu_read_sys_reg(vcpu, SCTLR_EL2) & SCTLR_ELx_WXN);

arch/arm64/kvm/at.c

995

wxn = (vcpu_read_sys_reg(vcpu, SCTLR_EL1) & SCTLR_ELx_WXN);

arch/arm64/kvm/debug.c

136

u64 mdscr = vcpu_read_sys_reg(vcpu, MDSCR_EL1) & ~(MDSCR_EL1_SS |

arch/arm64/kvm/debug.c

192

mdscr = vcpu_read_sys_reg(vcpu, MDSCR_EL1);

arch/arm64/kvm/emulate-nested.c

2694

spsr = vcpu_read_sys_reg(vcpu, SPSR_EL2);

arch/arm64/kvm/handle_exit.c

46

if (vcpu_read_sys_reg(vcpu, HCR_EL2) & HCR_HCD)

arch/arm64/kvm/hyp/exception.c

26

return vcpu_read_sys_reg(vcpu, reg);

arch/arm64/kvm/inject_fault.c

205

if (vcpu_read_sys_reg(vcpu, TCR_EL1) & TTBCR_EAE) {

arch/arm64/kvm/inject_fault.c

212

far = vcpu_read_sys_reg(vcpu, FAR_EL1);

arch/arm64/kvm/inject_fault.c

283

if (is_nested_ctxt(vcpu) && (vcpu_read_sys_reg(vcpu, HCR_EL2) & HCR_VM))

arch/arm64/kvm/inject_fault.c

287

esr = vcpu_read_sys_reg(vcpu, exception_esr_elx(vcpu));

arch/arm64/kvm/inject_fault.c

311

!(vcpu_read_sys_reg(vcpu, TCR_EL1) & TTBCR_EAE))

arch/arm64/kvm/inject_fault.c

314

esr = vcpu_read_sys_reg(vcpu, exception_esr_elx(vcpu));

arch/arm64/kvm/inject_fault.c

88

sctlr2 = vcpu_read_sys_reg(vcpu, SCTLR2_EL1);

arch/arm64/kvm/inject_fault.c

90

sctlr2 = vcpu_read_sys_reg(vcpu, SCTLR2_EL2);

arch/arm64/kvm/nested.c

406

u64 vtcr = vcpu_read_sys_reg(vcpu, VTCR_EL2);

arch/arm64/kvm/nested.c

415

wi.baddr = vcpu_read_sys_reg(vcpu, VTTBR_EL2);

arch/arm64/kvm/nested.c

419

wi.be = vcpu_read_sys_reg(vcpu, SCTLR_EL2) & SCTLR_ELx_EE;

arch/arm64/kvm/nested.c

666

vttbr = vcpu_read_sys_reg(vcpu, VTTBR_EL2);

arch/arm64/kvm/nested.c

667

vtcr = vcpu_read_sys_reg(vcpu, VTCR_EL2);

arch/arm64/kvm/nested.c

668

hcr = vcpu_read_sys_reg(vcpu, HCR_EL2);

arch/arm64/kvm/nested.c

749

s2_mmu->tlb_vttbr = vcpu_read_sys_reg(vcpu, VTTBR_EL2) & ~VTTBR_CNP_BIT;

arch/arm64/kvm/nested.c

750

s2_mmu->tlb_vtcr = vcpu_read_sys_reg(vcpu, VTCR_EL2);

arch/arm64/kvm/nested.c

751

s2_mmu->nested_stage2_enabled = vcpu_read_sys_reg(vcpu, HCR_EL2) & HCR_VM;

arch/arm64/kvm/nested.c

870

tcr = vcpu_read_sys_reg(vcpu, TCR_EL1);

arch/arm64/kvm/nested.c

874

tcr = vcpu_read_sys_reg(vcpu, TCR_EL2);

arch/arm64/kvm/nested.c

881

asid = FIELD_GET(TTBRx_EL1_ASID, vcpu_read_sys_reg(vcpu, ttbr_elx));

arch/arm64/kvm/pauth.c

158

u64 sctlr = vcpu_read_sys_reg(vcpu, SCTLR_EL2);

arch/arm64/kvm/pauth.c

163

*elr = ptr = vcpu_read_sys_reg(vcpu, ELR_EL2);

arch/arm64/kvm/pauth.c

63

u64 tcr = vcpu_read_sys_reg(vcpu, TCR_EL2);

arch/arm64/kvm/pauth.c

90

u64 tcr = vcpu_read_sys_reg(vcpu, TCR_EL2);

arch/arm64/kvm/pmu-emul.c

390

if (!(vcpu_read_sys_reg(vcpu, MDCR_EL2) & MDCR_EL2_HPME))

arch/arm64/kvm/sys_regs.c

2488

p->regval = vcpu_read_sys_reg(vcpu, reg);

arch/arm64/kvm/sys_regs.c

2500

csselr = vcpu_read_sys_reg(vcpu, CSSELR_EL1);

arch/arm64/kvm/sys_regs.c

2683

p->regval = vcpu_read_sys_reg(vcpu, ELR_EL1);

arch/arm64/kvm/sys_regs.c

3941

vttbr = vcpu_read_sys_reg(vcpu, VTTBR_EL2);

arch/arm64/kvm/sys_regs.c

3960

u64 vttbr = vcpu_read_sys_reg(vcpu, VTTBR_EL2);

arch/arm64/kvm/sys_regs.c

4015

u64 vttbr = vcpu_read_sys_reg(vcpu, VTTBR_EL2);

arch/arm64/kvm/sys_regs.c

494

p->regval = vcpu_read_sys_reg(vcpu, r->reg);

arch/arm64/kvm/sys_regs.c

568

val = vcpu_read_sys_reg(vcpu, r->reg);

arch/arm64/kvm/sys_regs.c

591

p->regval = (vcpu_read_sys_reg(vcpu, r->reg) & mask) >> shift;