vcpu_get_msr
uint64_t vcpu_get_msr(struct kvm_vcpu *vcpu, uint64_t msr_index);
r = vcpu_get_msr(vcpu, msr); \
TEST_ASSERT(vcpu_get_msr(vcpu, msr) == reset_value,
vcpu_get_msr(vcpu, msr));
TEST_ASSERT(!vcpu_get_msr(vcpu, msr),
msr, vcpu_get_msr(vcpu, msr));
actual = vcpu_get_msr(vcpu, MSR_K7_HWCR);
tsc_freq = vcpu_get_msr(vcpu, HV_X64_MSR_TSC_FREQUENCY);
t1 = vcpu_get_msr(vcpu, HV_X64_MSR_TIME_REF_COUNT);
t2 = vcpu_get_msr(vcpu, HV_X64_MSR_TIME_REF_COUNT);
val = vcpu_get_msr(vcpu, msr);
val = vcpu_get_msr(vcpu, msr);
uint64_t old_efer = vcpu_get_msr(vcpu, MSR_EFER);
uint64_t old_efer = vcpu_get_msr(vcpu, MSR_EFER);
msr_platform_info = vcpu_get_msr(vcpu, MSR_PLATFORM_INFO);
TEST_ASSERT_EQ(vcpu_get_msr(vcpu, MSR_IA32_TSC_ADJUST), UNITY * 123456);
#define rounded_host_rdmsr(x) ROUND(vcpu_get_msr(vcpu, x))
uint64_t val = vcpu_get_msr(vcpu, msr_index);
uint64_t val = vcpu_get_msr(vcpu, msr_index);
val = vcpu_get_msr(vcpu, MSR_IA32_FEAT_CTL);
TEST_ASSERT_EQ(vcpu_get_msr(vcpu, MSR_IA32_PERF_CAPABILITIES),
val = vcpu_get_msr(vcpu, MSR_IA32_PERF_CAPABILITIES);
val = vcpu_get_msr(vcpu, MSR_IA32_PERF_CAPABILITIES);
apic_base = vcpu_get_msr(vcpus[i], MSR_IA32_APICBASE);
xss_val = vcpu_get_msr(vcpu, MSR_IA32_XSS);