arch/mips/cavium-octeon/executive/cvmx-helper.c

103

qlm_cfg.u64 = cvmx_read_csr(CVMX_MIO_QLMX_CFG(0));

arch/mips/cavium-octeon/executive/cvmx-helper.c

117

qlm_cfg.u64 = cvmx_read_csr(CVMX_MIO_QLMX_CFG(interface));

arch/mips/cavium-octeon/executive/cvmx-helper.c

129

qlm_cfg.u64 = cvmx_read_csr(CVMX_MIO_QLMX_CFG(3));

arch/mips/cavium-octeon/executive/cvmx-helper.c

134

qlm_cfg.u64 = cvmx_read_csr(CVMX_MIO_QLMX_CFG(1));

arch/mips/cavium-octeon/executive/cvmx-helper.c

176

mio_qlm_cfg.u64 = cvmx_read_csr(CVMX_MIO_QLMX_CFG(2));

arch/mips/cavium-octeon/executive/cvmx-helper.c

178

mio_qlm_cfg.u64 = cvmx_read_csr(CVMX_MIO_QLMX_CFG(1));

arch/mips/cavium-octeon/executive/cvmx-helper.c

195

qlm_cfg.u64 = cvmx_read_csr(CVMX_MIO_QLMX_CFG(2));

arch/mips/cavium-octeon/executive/cvmx-helper.c

203

qlm_cfg.u64 = cvmx_read_csr(CVMX_MIO_QLMX_CFG(0));

arch/mips/cavium-octeon/executive/cvmx-helper.c

214

qlm_cfg.u64 = cvmx_read_csr(CVMX_MIO_QLMX_CFG(0));

arch/mips/pci/pcie-octeon.c

1179

qlmx_cfg.u64 = cvmx_read_csr(CVMX_MIO_QLMX_CFG(pcie_port));