arch/mips/cavium-octeon/executive/cvmx-l2c.c

372

cvmx_write_csr(CVMX_L2C_DBG, l2cdbg.u64);

arch/mips/cavium-octeon/executive/cvmx-l2c.c

373

cvmx_read_csr(CVMX_L2C_DBG);

arch/mips/cavium-octeon/executive/cvmx-l2c.c

402

cvmx_write_csr(CVMX_L2C_DBG, 0);

arch/mips/cavium-octeon/executive/cvmx-l2c.c

403

cvmx_read_csr(CVMX_L2C_DBG);

arch/mips/cavium-octeon/executive/cvmx-l2c.c

597

uint64_t dbg_addr = CVMX_L2C_DBG;

arch/mips/cavium-octeon/executive/cvmx-l2c.c

907

cvmx_write_csr(CVMX_L2C_DBG, l2cdbg.u64);

arch/mips/cavium-octeon/executive/cvmx-l2c.c

908

cvmx_read_csr(CVMX_L2C_DBG);

arch/mips/cavium-octeon/executive/cvmx-l2c.c

915

cvmx_write_csr(CVMX_L2C_DBG, 0);

arch/mips/cavium-octeon/executive/cvmx-l2c.c

916

cvmx_read_csr(CVMX_L2C_DBG);