vcap_rule_add_key_u32
return vcap_rule_add_key_u32(vrule, VCAP_KF_ETYPE, ETH_P_1588, ~0);
return vcap_rule_add_key_u32(vrule, VCAP_KF_L4_DPORT, PTP_EV_PORT, ~0) ||
return vcap_rule_add_key_u32(vrule, VCAP_KF_L4_DPORT, PTP_GEN_PORT, ~0) ||
err = vcap_rule_add_key_u32(st->vrule, VCAP_KF_ETYPE,
err = vcap_rule_add_key_u32(st->vrule, VCAP_KF_ETYPE,
err = vcap_rule_add_key_u32(st->vrule,
err = vcap_rule_add_key_u32(vrule, VCAP_KF_LOOKUP_GEN_IDX_SEL,
return vcap_rule_add_key_u32(vrule, VCAP_KF_LOOKUP_GEN_IDX,
return vcap_rule_add_key_u32(vrule, VCAP_KF_LOOKUP_PAG,
return vcap_rule_add_key_u32(vrule, VCAP_KF_ISDX_CLS,
vcap_rule_add_key_u32(rule, VCAP_KF_IF_IGR_PORT_MASK, 0,
vcap_rule_add_key_u32(rule, VCAP_KF_LOOKUP_INDEX, lookup, 0x3);
vcap_rule_add_key_u32(rule, VCAP_KF_IF_IGR_PORT_MASK, 0,
vcap_rule_add_key_u32(rule, VCAP_KF_IF_EGR_PORT_NO,
err = vcap_rule_add_key_u32(st->vrule,
err = vcap_rule_add_key_u32(st->vrule,
err = vcap_rule_add_key_u32(vrule, VCAP_KF_LOOKUP_GEN_IDX_SEL,
return vcap_rule_add_key_u32(vrule, VCAP_KF_LOOKUP_GEN_IDX,
return vcap_rule_add_key_u32(vrule, VCAP_KF_LOOKUP_PAG,
return vcap_rule_add_key_u32(vrule, VCAP_KF_ISDX_CLS, link_val,
err = vcap_rule_add_key_u32(st->vrule,
err = vcap_rule_add_key_u32(st->vrule,
err = vcap_rule_add_key_u32(st->vrule, VCAP_KF_ETYPE,
vcap_rule_add_key_u32(rule, VCAP_KF_IF_IGR_PORT_MASK_SEL, 0, 0xf);
vcap_rule_add_key_u32(rule, VCAP_KF_IF_IGR_PORT_MASK_RNG, range, 0xf);
vcap_rule_add_key_u32(rule, VCAP_KF_IF_IGR_PORT_MASK, 0, port_mask);
vcap_rule_add_key_u32(rule, VCAP_KF_IF_EGR_PORT_MASK_RNG, range, 0xf);
vcap_rule_add_key_u32(rule, VCAP_KF_IF_EGR_PORT_MASK, 0, port_mask);
vcap_rule_add_key_u32(rule, VCAP_KF_IF_EGR_PORT_NO, port->portno, ~0);
vcap_rule_add_key_u32(rule, VCAP_KF_8021Q_TPID, SPX5_TPID_SEL_UNTAGGED,
ret = vcap_rule_add_key_u32(rule, VCAP_KF_TYPE,
EXPORT_SYMBOL_GPL(vcap_rule_add_key_u32);
int vcap_rule_add_key_u32(struct vcap_rule *rule, enum vcap_key_field key,
ret = vcap_rule_add_key_u32(rule, VCAP_KF_TYPE, 0x98765432, 0xff00ffab);
ret = vcap_rule_add_key_u32(rule, VCAP_KF_IF_IGR_PORT_MASK_RNG,
ret = vcap_rule_add_key_u32(rule, VCAP_KF_IF_IGR_PORT_MASK,
err = vcap_rule_add_key_u32(st->vrule, VCAP_KF_L4_SPORT, value,
err = vcap_rule_add_key_u32(st->vrule, VCAP_KF_L4_DPORT, value,
err = vcap_rule_add_key_u32(st->vrule, vid_key,
err = vcap_rule_add_key_u32(st->vrule, pcp_key,
err = vcap_rule_add_key_u32(st->vrule, vid_key,
err = vcap_rule_add_key_u32(st->vrule, pcp_key,
err = vcap_rule_add_key_u32(st->vrule, VCAP_KF_ARP_OPCODE,
err = vcap_rule_add_key_u32(st->vrule, VCAP_KF_L3_IP4_SIP,
err = vcap_rule_add_key_u32(st->vrule, VCAP_KF_L3_IP4_DIP,
err = vcap_rule_add_key_u32(st->vrule, VCAP_KF_L3_TOS,
err = vcap_rule_add_key_u32(st->vrule,
err = vcap_rule_add_key_u32(st->vrule,