arch/mips/cavium-octeon/executive/cvmx-helper-rgmii.c

110

cvmx_write_csr(CVMX_GMXX_TXX_SLOT(index, interface), 0x200);

arch/mips/cavium-octeon/executive/cvmx-helper-rgmii.c

387

cvmx_write_csr(CVMX_GMXX_TXX_SLOT(index, interface), 0x40);

arch/mips/cavium-octeon/executive/cvmx-helper-rgmii.c

391

cvmx_write_csr(CVMX_GMXX_TXX_SLOT(index, interface), 0x40);

arch/mips/cavium-octeon/executive/cvmx-helper-rgmii.c

395

cvmx_write_csr(CVMX_GMXX_TXX_SLOT(index, interface), 0x200);

arch/mips/cavium-octeon/executive/cvmx-helper-sgmii.c

257

cvmx_write_csr(CVMX_GMXX_TXX_SLOT(index, interface), 64);

arch/mips/cavium-octeon/executive/cvmx-helper-sgmii.c

265

cvmx_write_csr(CVMX_GMXX_TXX_SLOT(index, interface), 64);

arch/mips/cavium-octeon/executive/cvmx-helper-sgmii.c

273

cvmx_write_csr(CVMX_GMXX_TXX_SLOT(index, interface), 512);

arch/mips/cavium-octeon/executive/cvmx-helper-xaui.c

205

cvmx_write_csr(CVMX_GMXX_TXX_SLOT(0, interface), 512);