vACR
via1[vACR] &= ~0xC0; /* setup T1 timer with no PB7 output */
via1[vACR] &= ~0x03; /* disable port A & B latches */
via2[vACR] &= ~0xC0; /* setup T1 timer with no PB7 output */
via2[vACR] &= ~0x03; /* disable port A & B latches */
(uint) via1[vDirA], (uint) via1[vDirB], (uint) via1[vACR]);
(uint) via2[vACR]);
via1[vACR] |= 0x40;